SN74LV00A Search Results

A115-A

Abstract: C101 SN54LV00A SN74LV00A
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B

SN54LV00A

Abstract: SN74LV00A
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389C – SEPTEMBER 1997 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389B - SEPTEMBER 1997 - REVISED APRIL 1998 EPIC Enhanced-Performance implanted CMOS Process SN54LVOOA . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE (TOP VIEW) Typical V q l p (Output Ground Bounce)

LV00A

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389E – SEPTEMBER 1997 – REVISED AUGUST 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B 1Y

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV00A SN74LV00A
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D Ioff Supports Partial-Power-Down Mode D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce SN54LV00A . . . J OR W PACKAGE

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389G – SEPTEMBER 1997 – REVISED OCTOBER 2002 SN54LV00A . . . J OR W PACKAGE SN74LV00A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 4B 4A 4Y 3B 3A 3Y 1B

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

lv00a

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV00A SN74LV00A
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

LV00A

Abstract: A115-A C101 SN54LV00A SN74LV00A 74lv00a
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389D – SEPTEMBER 1997 – REVISED JANUARY 2001 D D D D 2-V to 5.5-V VCC Operation Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25°C

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2ĆINPUT POSITIVEĆNAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV00A SN74LV00A lv00a
Contextual Info: SN54LV00A, SN74LV00A QUADRUPLE 2-INPUT POSITIVE-NAND GATES SCLS389J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP Output Ground Bounce D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)