SN74LS22 Search Results

jl 54123

Abstract: SN64121
Contextual Info: TYPES SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS R E V IS E D D E C E M B E R 1 9 8 3 SN54221, SN54LS221 . . . J OR W PACKAGE SN74221 . . J OR N PACKAGE SN74LS221 . . D, J OR N PACKAGE TOP VIEW 1A C 1 ^ J l 6

Contextual Info: SN54LS224A, SN74LS224A 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES WITH 3-STATE OUTPUTS SDLS023E – JANUARY 1991 – REVISED APRIL 2003 A first-in, first-out FIFO memory is a storage device that allows data to be written to and read from its array at independent data rates. These

74LS224

Abstract: 16X4
Contextual Info: SN74LS224A 16x4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH 3-STATE OUTPUTS SDLS023B - JANUARY 1991 - REVISED APRIL 1998 • Independent Synchronous Inputs and Outputs • 16 Words by 4 Bits Each • 3-State Outputs Drive Bus Lines Directly • Data Rates up to 10 MHz

SN74121 equivalent

Abstract: SN74123 application note 74221
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SDLS213A – DECEMBER 1983 – REVISED FEBRUARY 1998 D D TYPE 21 SN74221 28 SN54LS221 49 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1Rext/Cext 1Cext 1Q 2Q 2CLR

Contextual Info: SN54LS224A, SN74LS224A 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES WITH 3-STATE OUTPUTS SDLS023E – JANUARY 1991 – REVISED APRIL 2003 A first-in, first-out FIFO memory is a storage device that allows data to be written to and read from its array at independent data rates. These

1N3064

Abstract: 1N916 SN54LS224A SN74LS224A SN54LS224
Contextual Info: SN54LS224A, SN74LS224A 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES WITH 3-STATE OUTPUTS SDLS023E – JANUARY 1991 – REVISED APRIL 2003 A first-in, first-out FIFO memory is a storage device that allows data to be written to and read from its array at independent data rates. These

SN54121

Abstract: SN54123 SN54221 SN54LS123 SN54LS221 SN74121 SN74123 SN74221 SN74LS221 74ls221 application notes
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

SN54522

Abstract: SN5422 LS22 SDLS080 SN54LS22 SN54S22 SN7422 SN74LS22 SN74S22
Contextual Info: SN5422, SN54LS22, SM54S22, SN7422, SN74LS22, SN74S22 d u a l 4-INPUT POSITIVE-NAND GATES WITH OPEN-COLLECTOR OUTPUTS SDLS 080 DECEMBER 1983 - • Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers and Flat Packages, and Plastic and Ceramic

SN74LS221

Abstract: LS123 LS221 SN74LS123 SN74LS221D SN74LS221DR2 SN74LS221N SN74LS123* one-shot
Contextual Info: SN74LS221 Dual Monostable Multivibrators with Schmitt-Trigger Inputs Each multivibrator of the LS221 features a negative-transitiontriggered input and a positive-transition-triggered input either of which can be used as an inhibit input. Pulse triggering occurs at a voltage level and is not related to the

74LS221

Abstract: SN74121 Monostable multivibrator with SN74121 74221 JM38510/31402BEA SNJ54LS221J SNJ54LS221FK SN54121 SN54123 SN54221
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

1N3064

Abstract: 1N916 SN54LS224A SN74LS224A
Contextual Info: SN54LS224A, SN74LS224A 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES WITH 3-STATE OUTPUTS SDLS023D – JANUARY 1991 – REVISED MARCH 2002 A first-in, first-out FIFO memory is a storage device that allows data to be written to and read from its array at independent data rates. These

SN54121

Abstract: SN54123 SN54221 SN54LS123 SN54LS221 SN74121 SN74123 SN74221 SN74LS221 5544Q
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SDLS213A – DECEMBER 1983 – REVISED FEBRUARY 1998 D D TYPE 21 SN74221 28 SN54LS221 49 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1Rext/Cext 1Cext 1Q 2Q 2CLR

74LS221

Contextual Info: g MOTOROLA SN54LS221 SN74LS221 DESCRIPTION — Each m ultivibrator of the LS221 features a negative-transition-triggered input and a positive-transition-triggered input either of w hich can be used as an inhibit input. Pulse triggering occurs at a voltage level and is not related to the

Contextual Info: g M OTOROLA SN54LS22 SN74LS22 Vcc R R R R R R R DUAL 4 -INPUT NAND GATE □ QTiJH Hl-niJ LOW POWER SCHOTTKY ‘ OPEN COLLECTOR OUTPUTS J Suffix — Case 632-07 (Ceramic) N Suffix — Case 646-05 (Plastic) G U ARAN TEED OPERATING RAN GES S YM BO L MIN TYP

Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

SN74221 equivalent

Abstract: SN54121 SN54123 SN54221 SN54LS123 SN54LS221 SN74121 SN74123 SN74221 SN74LS123
Contextual Info: TYPES SN54221, SN54LS221. SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SN 54221, S N 5 4 L S 2 2 Ì . . . J OR W P A C K A G E SN 74221, SN74LS221 . . . J O R N P A C K A G E SIM54221, SIM 54LS221, SIM74221 and S N 7 4 L S 2 2 1 A re Dual V ersions of Highly

LS04

Abstract: SN74LS228
Contextual Info: SN74LS228 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY WITH OPEN-COLLECTOR OUTPUTS SDLS024 – JANUARY 1991 – REVISED SEPTEMBER 1993 • • • • • • • N PACKAGE TOP VIEW Independent Synchronous Inputs and Outputs 16 Words by 4 Bits Data Rates From 0 to 10 MHz

Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

74ls221 application notes

Abstract: Monostable multivibrator with SN74121 74LS221 74221 Q7050 SN74121 application note SN54121 SN54123 SN54LS123 SN54LS221
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

Contextual Info: SN74LS224N IL08 TTL 16 WORD x 4 -BIT ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY —TOP VIEW— 4 VCC 16 OE 1 5 6 15 UNCK IR 2 LDCK 3 7 14 OR 3 15 D0 4 13 Q0 D1 5 D2 6 D3 7 Q0 D1 Q1 D2 Q2 D3 Q3 LD IR UN OR OE RD 12 Q1 1 9 11 Q2 INPUT D0 - D3 LDCK OE RD UNCK 10 Q3

sn74ls221n

Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITTĆTRIGGER INPUTS SDLS213B − DECEMBER 1983 − REVISED NOVEMBER 2004 D Dual Versions of Highly Stable SN54121 D TYPE MAXIMUM OUTPUT PULSE LENGTH S SN54221 21 SN74221 28 SN54LS221

SN74121 application note

Abstract: SN74LS221 SN74121 equivalent SN54221
Contextual Info: SN54221, SN54LS221, SN74221, SN74LS221 DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS SDLS213A – DECEMBER 1983 – REVISED FEBRUARY 1998 D D TYPE 21 SN74221 28 SN54LS221 49 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 1Rext/Cext 1Cext 1Q 2Q 2CLR

Contextual Info: SN54LS224A, SN74LS224A 16 x 4 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES WITH 3-STATE OUTPUTS SDLS023E – JANUARY 1991 – REVISED APRIL 2003 A first-in, first-out FIFO memory is a storage device that allows data to be written to and read from its array at independent data rates. These

SN74LS123* one-shot

Contextual Info: SN74LS221 Dual Monostable Multivibrators with Schmitt-Trigger Inputs Each multivibrator of the LS221 features a negative-transitiontriggered input and a positive-transition-triggered input either of which can be used as an inhibit input. Pulse triggering occurs at a voltage level and is not related to the