SN74HC7 Search Results

SN74HC74

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

Contextual Info: SN54HC7266, SN74HC72S6 QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES D 2 8 0 4 . M A R C H 1 9 8 4 -R E V IS E D SEPTEMBER 1 9 8 7 • Dependable Texas Instruments Quality and Reliability • Totem-Pole Version of 'HC266 S N 5 4 H C 7 2 6 6 . . . J P AC K A G E S N 7 4 H C 7 2 6 6 . . . D OR N P AC KA G E

0913n

Contextual Info: SN54HC7266, SN74HC7266 QUADRUPLE 2-INPUT EXCLUSIVE NOR GATES D 2804, MARCH 1 9 8 4 - REVISED SEPTEMBER 1987 Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 5 4 H C 7 2 6 6 . . . J PAC KA G E

Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS _ SCLS033B - MARCH 1984 - REVISED JULY 1996 • Operation From Very Slow Input Transitions SN54HC7002 . . . J OR W PACKAGE SN74HC7002. . . D OR N PACKAGE TOP VIEW

hes 1-221

Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVEĆNOR GATES WITH SCHMITTĆTRIGGER INPUTS SCLS033F − MARCH 1984 − REVISED NOVEMBER 2004 D D D D D D D Wide Operating Voltage Range of 2 V to 6 V Typical tpd = 14 ns Low Power Consumption, 20-µA Max ICC Low Input Current of 1 µA Max

Contextual Info: SN54HC7032, SN74HC7032 QUADRUPLE POSITIVE-OR GATES WITH SCHMITT-TRIGGER INPUTS SCLS036A - MARCH 1984 - REVISED JANUARY 1996 Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC32 Package Options Include Plastic

SN54HC7002

Abstract: SN74HC7002
Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS SCLS033B - M ARCH 1984 - R EVIS ED JULY 1996 • Operation From Very Slow Input Transitions SN54HC7002 . . . J OR W PACKAGE SN74HC7002 . . . D OR N PACKAGE TOP VIEW ) • 1A [ 1

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS094D – DECEMBER 1982 – REVISED JULY 2003 D D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 40-µA Max ICC

HC08

Abstract: SN54HC7001 SN74HC7001
Contextual Info: SN54HC7001, SN74HC7001 QUADRUPLE POSITIVE-AND GATES WITH SCHMITT-TRIGGER INPUTS SCLS035A - M ARCH 1984 - R EVISED JANUARY 1996 Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC08 Package Options Include Plastic

hc700

Abstract: SN54HC7002 SN74HC7002 SN74HC7002D SN74HC7002DR SN74HC7002N SN74HC7002NSR SN74HC7002PW SN74HC7002PWR SNJ54HC7002J
Contextual Info: SN54HC7002, SN74HC7002 QUADRUPLE POSITIVE-NOR GATES WITH SCHMITT-TRIGGER INPUTS SCLS033D – MARCH 1984 – REVISED DECEMBER 2002 D D D D D D D Wide Operating Voltage Range of 2 V to 6V Typical tpd = 14 ns Low Power Consumption, 20-µA Max ICC Low Input Current of 1 µA Max

HC74

Abstract: SN74HC74 SN54HC74 SN74HC74D SN74HC74DBR SN74HC74DR SN74HC74N SN74HC74NSR SN74HC74PW
Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS094C – DECEMBER 1982 – REVISED DECEMBER 2002 D D D D D D SN54HC74 . . . J OR W PACKAGE SN74HC74 . . . D, DB, N, NS, OR PW PACKAGE TOP VIEW Wide Operating Voltage Range of 2 V to 6 V

Contextual Info: SN54HC7032, SN74HC7032 QUADRUPLE POSITIVE-OR GATES WITH SCHMITT-TRIGGER INPUTS SCLS036B - MARCH 1984 - REVISED MAY 1997 • This is text in a key features bullet. This is text in a key features bullet. • Operation From Very Slow Input Transitions SN54HC7032 . . . J OR W PACKAGE

HC08

Abstract: SN54HC7001 SN74HC7001
Contextual Info: SN54HC7001, SN74HC7001 QUADRUPLE POSITIVE-AND GATES WITH SCHMITT-TRIGGER INPUTS SCLS035B – MARCH 1984 – REVISED MAY 1997 D D D D D Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC08

Contextual Info: SN54HC7032, SN74HC7032 QUADRUPLE POSITIVEĆOR GATES WITH SCHMITTĆTRIGGER INPUTS SCLS036E − MARCH 1984 − REVISED NOVEMBER 2004 SN54HC7032 . . . J OR W PACKAGE SN74HC7032 . . . D, N, OR NS PACKAGE TOP VIEW D Wide Operating Voltage Range of 2 V to 6 V

SN74HC74

Abstract: HC74 MPDI002A MS-001 SN54HC74
Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS094B – DECEMBER 1982 – REVISED MAY 1997 D SN54HC74 . . . J OR W PACKAGE SN74HC74 . . . D, DB, N, OR PW PACKAGE TOP VIEW Package Options Include Plastic Small-Outline (D), Shrink Small-Outline

Contextual Info: SN54HC7008, SN74HC7008 6-SECTION MULTIFUNCTION NANO, INVERT. NOR CIRCUITS D 2 8 8 0 , M AR C H 1 9 8 5 -R E V IS E D SEPTEMBER 1 9 8 7 • S N 54H C 70008 . . JT PACKAGE SN 74H C 7008 . . . DW OR NT PACKAGE Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers,

Contextual Info: SN54HC77, SN74HC77 4-BIT BISTABLE LATCHES D 2 6 8 4 , DECEMBER 1982 - Package Options Include Plastic "Small Outline" Packages, Standard Plastic and Ceramic 300-mil DIPs SN54HC77 . . . J PACKAGE SN74HC77 . . . D OR N PACKAGE TOP VIEW] 1DC Dependable Texas Instruments Quality and

Contextual Info: SN74HC74-EP DUAL D-TYPE POSITIVE EDGE TRIGGERED FLIP-FLOP WITH CLEAR AND PRESET www.ti.com SCLS710 – MARCH 2008 FEATURES 1 • • • • • 1 • • • • • • Controlled Baseline – One Assembly Site – One Test Site – One Fabrication Site

SN74HC74DR

Abstract: SN74HC74DT
Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET SCLS094D – DECEMBER 1982 – REVISED JULY 2003 D D D D D D Wide Operating Voltage Range of 2 V to 6 V Outputs Can Drive Up To 10 LSTTL Loads Low Power Consumption, 40-µA Max ICC

Contextual Info: SN54HC7032, SN74HC7032 QUADRUPLE POSITIVE-OR GATES WITH SCHMITT-TRIGGER INPUTS SCLS036B – MARCH 1984 – REVISED MAY 1997 D D D D D Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HC32

SN54HC7002

Abstract: SN74HC7002
Contextual Info: SN54HC7002, SN74HC7002 Q U A D R U P L E P O S ITIV E-N O R GATES WITH SCHMITT-TRIGGER INPUTS D 2 8 3 1 , M ARC H 1 9 8 4 -R E V IS E D SEPTEMBER 198 7 Operation from Very Slow Input Transitions S N 5 4 H C 7 0 0 2 . . . J P AC KA G E S N 7 4 H C 7 0 0 2 . . . D OR N P AC KA G E

SN74HC7001

Abstract: HC08 SN54HC7001
Contextual Info: SN54HC7001, SN74HC7001 QUADRUPLE POSITIVE-AND GATES WITH SCHMITT TRIGGER INPUTS D 2 8 3 1 , M A R C H 1 9 8 4 - R E V IS E D S E P T E M B E R 1 9 8 7 S N 5 4 H C 7 0 0 1 . . . J PACKAGE S N 74H C 7001 D OR N PACKAGE O p era tio n fro m V e ry S lo w In put Transitions

SN74HC7006

Contextual Info: SN54HC7006, SN74HC700G 6-SECTION MULTIFUNCTION NANO, INVERT. NOR CIRCUITS _ D2831, MARCH 1 9 8 ^R E V IS E D SEPTEMBER 1987 • SN54HC 7C S N 74H C 7006 Package Options Include Plastic "Sm all Outline" Packages, Ceramic Chip Carriers,

SN54HC75

Abstract: ic 4 bit bistable latch device SN74HC75 SN54HC77
Contextual Info: SNS4HC75, SN74HC75 4 BIT BISTABLE LATCHES D2684, D EC EM BER 1982 - R E V IS E D S E P T E M B E R 1 9 8 7 SN 54H C75 . . . J PACKAG E SN 74H C75 D OR N P A C K A G E Complimentary Q and Q Outputs Package Options Include Plastic "Small Outline" Packages, Standard Plastic and