SN54HC Search Results

54HC573

Contextual Info: SN54HC573, SN74HC573 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D26B4. DECEMBER 1982-REVISED SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads • Bus-Structured Pinout Package Options Include Plastic "Small

SN74HC74

Contextual Info: SN54HC74, SN74HC74 DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET _ SCLS094A - DECEMBER 1982 - REVISED JANUARY 1996 Package Options Include Plastic Small-Outline D , Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), and

IC SN74HC

Abstract: SN74HCTOO SN74HC
Contextual Info: SN54HCT00, SN74HCT00 QUADRUPLE 2-INPUT POSITIVE NANO GATES D 3 2 4 3 , NOVEMBER 1968 Inputs are TTL-Voftage Compatible S N 54H C T00 S N 74H C T00 Package Options Include Plastic "Small Outline" Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil

Contextual Info: SN54HCT534, SN74HCT534 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3-STATE OUTPUTS D 2 8 0 4 , M A R CH 1 9 8 4 - R E V IS E D S EP T EM B ER 1 987 • Inputs are TTL-Voltage Compatible • High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads

Contextual Info: SN54HC563, SN74HC563 OCTAL D TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 • High-Current 3-State Output Drive Bus-Lines Directly or Up to 15 LSTTL Loads S N 5 4 H C 5 6 3 . . . J P AC KAG E S N 7 4 H C 5 6 3 . . . D W OR N P AC KA G E

54HC154

Contextual Info: SN54HC154, SN74HC154 LINE TO 16 LINE DECODERS/DEMULTIPLEXERS D 2 6 8 4 , DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1987 • Decodes 4 Binary-Coded Inputs into One of 16 Mutually Exclusive Outputs • Performs the Demultiplexing Function by Distributing Data From One Input to Any

t244

Abstract: 74hct244 i.c t244 MAX2825
Contextual Info: SN54HCT244, SN 74H C T244 O C TAL BU FFERS AN D LINE DRIVERS WITH 3-STATE OUTPUTS D 2 8 0 4 . M AR C H 1 9 8 4 -R E V IS E D SEPTEMBER 1 9 8 7 Inputs arc TTL-Voltage Compatible S N 5 4 H C T 2 4 4 . . . J P AC KAG E S N 74H C T244 . D W OR N PAC KAG E 3-State Outputs Drive Bus Lines or Buffer

Contextual Info: SN54HC132, SN74HC132 QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS SCLS034B - DECEMBER 1982 - REVISED JANUARY 1996 • • • • • Operation From Very Slow Input Transitions Temperature-Compensated Threshold Levels High Noise Immunity Same Pinouts as ’HCOO

SN64HC

Contextual Info: SNS4HCT651, SN54HCT652. SN74HCT651. SN74HCT652 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS D2B04, MARCH 19B4-REVISED SEPTEMBER 1987 Inputs are TTL-Voltage Compatible S N 6 4 H C T 6 6 1 , S N 6 4 H C T 6 6 2 . . . J T PACKAGE S N 7 4 H C T 6 6 1 . S N 7 4 H C T 6 6 2 . . . O W OR N T PACKAGE

Contextual Info: SN54HC832, SN74HC832 HEX 2-INPUT OR DRIVERS D 2804, MARCH 1 9 8 4 -R E V IS E D SEPTEM BER 1987 SN 54H C 832 . . . J PACKAGE SN 7 4 H C 8 3 2 . . . D W O R N P A C K A G E High-Current Outputs Can Drive Up to 15 LSTTL Loads TO P V IEW Package Options Include Plastic "Small

821A4

Contextual Info: SN54HCT242, SN54HCT243 SN74HCT242, SN74HCT243 QUADRUPLE BUS TRANSCEIVERS WITH 3 STATE OUTPUTS D 2 8 0 4 . M AR C H 1 9 8 4 - Inputs are TTL-Voltage Compatible • 2-W ay Asynchronous Communication Between Data Buses TO P V IE W ] G1 C 1 L J l4 H V CC 13 2 G2

Contextual Info: SN54HC03, SN74HC03 QUADRUPLE 2-INPUT POSITIVE-NAMD GATES WITH OPEN-DRAIN OUTPUTS _ Package Options Include Plastic Small-Outllne D and Ceramic Flat (W) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (N) and Ceramic (J) 300-mll DIPs

CT674

Abstract: 54HCT574
Contextual Info: SN54HCT574, SN74HCT574 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS D 2804. M A R C H • Inputs are TTL-Voltage Compatible • High-Current 3-State Noninverting Outputs Drive Bus-Lines Directly or Up to 15 LSTTL Loads Bus-Structured Pinout

54HC86

Abstract: 74HC86
Contextual Info: SN54HC86, SN74HC86 QUADRUPLE 2 INPUT EXCLUSIVE-OR GATES D 2684, DECEM BER 1 9 8 2 -R E V IS E D SEPTEM BER 1987 • Package Options Include Plastic "Sm all O utline" Packages, Ceram ic Chip Carriers, and Standard Plastic and Ceram ic 300-mil DIPs SN 54H C 86

54HC112

Contextual Info: SN54HC112, SN74HC112 DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET 02684, DECEMBER 1982-REVISED SEPTEMBER 1987 SN54HC112 . . . J PACKAGE SN74HC112 . . . D OR N PACKAGE TOP VIEW ] 1CLK C 1 O l 6 H V CC i k C 2 15 3 1CLR 14 H 2CLR u [ 3

Contextual Info: SN54HC533, SN74HC533 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS D 2 6 8 4 . DECEMBER 1 9 8 2 -R E V IS E D SEPTEMBER 1 9 8 7 • 8 Latches in a Single Package • High-Current 3-State Inverting Outputs Can Drive Up to 15 LSTTL Loads S N 5 4 H C S 3 3 . . . J PACKAGE

54HC245

Contextual Info: SN54HC245, SN74HC245 O C TAL BUS TRAN SC EIVERS WITH 3-STATE OUTPUTS D2684. DECEMBER 1982 - REVISED SEPTEMBER 1987 High-Current 3-State Outputs Drive Bus Lines Directly or Up to 15 LSTTL Loads S N 5 4 H C 2 4 5 . . . J P AC KAG E S N 7 4 H C 2 4 5 . . . D W OR N P AC KA G E

Contextual Info: SN54HC367, SN74HC367 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ SCLS309A - JANUARY 1996 - REVISED JULY 1996 High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive up to 15 LSTTL Loads True Outputs SN54HC367

54HC4016

Abstract: n12110 C4016
Contextual Info: SN54HC4016, TLC4016I SILICON-GATE CMOS QUADRUPLE BILATERAL ANALOG SWITCH 0 2 9 2 2 . J A N U A R Y 1986 SN 5 4 H C 4 0 1 6 . . . J O R N P A C K A G E TLC4016I . . . D OR N PA C KA G E High Degree of Linearity High On-Off Output Voltage Ratio TOP VIEW Low Crosstalk Between Sw itches

Contextual Info: SN54HCT240, SN74HCT240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS SCLS174A - MARCH 1984 - REVISED JANUARY 1996 Inputs Are TTL-Voltage Compatible SN54HCT240. . . J OR W PACKAGE SN74HCT240 . . . DW OR N PACKAGE TOP VIEW 3-State Outputs Drive Bus Lines or Buffer

Ct533

Contextual Info: SN54HCTS33, SN74HCT533 OCTAL 0 TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS 0 2 8 0 4 , M AR C H 1 9 8 4 -R E V IS E D SEPTEMBER 1987 S N 5 4 H C T 5 3 3 . . . J P AC KAG E SN74H C T533 D W OR N P AC KA G E Inputs are TTL-Voltage Compatible 8 Latches in a Single Package

Contextual Info: SN54HC00, SN74HC00 QU AD R U PLE 2 INPUT POSITIVE-NAND G ATES D 2 6 8 4 . DECEMBER 1 9 8 2 -R E V IS E D M ARC H 1 9 8 4 S N 54H C 00 SN 74H C 00 TO P V IE W 1AC IB C 2 1Y0 3 2AÊ 4 Dependable Texas Instruments Quality and Reliability Th ese devices co n tain four in dependent 2 -in p u t

SN54HCT240

Abstract: 8S63
Contextual Info: SN54HCT240, SN74HCT240 OCTAL BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ SCLS174A - MARCH 1984 - REVISED JANUARY 1996 • Inputs Are TTL-Voltage Compatible • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers • SN54HCT240 . . . J OR W PACKAGE

Contextual Info: SN54HCT125, SN74HCT125 QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS SCLS069S- NOVEMBER 198« - REVISED MARCH 1996 • ■ I • • Inputs Are TTL-Voltage Compatible High-Current 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers I I •