SN5417 Search Results

74170

Abstract: OF IC 74170
Contextual Info: TTL MSI TYPES SN54170, SN54LS170. SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLtECTOR OUTPUTS B U L L E T IN N O , D L -S 7 6 1 1 3 4 9 , M A R C H 1 9 7 4 — R E V IS E D O C T O B E R 1 9 7 6 • Separate Read/Write Addressing Permits Simultaneous Reading and Writing

SN741

Abstract: SN54176
Contextual Info: SN54176, SN54177, SN74176, SN74177 35-MHz PRESETTABLE DECADE AND BINARY COUNTERS/LATCHES M A Y 1 9 7 1 - R E V IS E D M A R C H 1988 Reduced-Power Versions of SN54196, SN 54197, SN74196, and SN74197 50-MHz Counters S N 5 4 1 7 6 , S N 5 4 1 7 7 . . . J PACKAGE

ic 7407

Abstract: IC 7417 specifications ic 7407 2yl1 7407 7417 TTL
Contextual Info: TYPES SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS _ Converts TTL Voltage Levels to MOS Levels R E V IS E D D E C E M B E R 1 9 8 3 S N 5407, S N 5417 . . . J OR W PACKAGE S N 7407, S N 7417 . . . J OR N PACKAGE

74179 register ic

Abstract: IC 74178 74179 4 bit shift register
Contextual Info: TYPES SN54178, SN54179, SN74178, SN74179 4-BIT PARALLEL-ACCESS SHIFT REGISTERS D E C E M B E R 1 9 7 2 -R E V IS E D D E C E M B E R 1983 Typical Maximum Clock Frequency . . . 39 MHz • Three Operating Modes: S N 7 4 1 7 8 . . . J OR N P A C K A G E TO P V IE W

74L5

Contextual Info: TYPES SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS OCTOBER 1976 — REVISED APRIL 1985 S N 54173, SN 54LS 173A . . . J OR W PACKAGE S N 7417 3 . . . J OR N PACKAGE S N 74L5 173A . . . D, J OR N PACKAGE 3-State Outputs Interface Directly w ith

2D 1002 integrated circuit

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

SN74171

Abstract: SN5407 SN5417 SN7407 SN7407D SN7407DR SN7407N SN7417 SN7417D SN7417DR
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

SN7407N equivalent

Abstract: 7407 TTL SN5407 SN5417 SN7407 SN7407D SN7407DR SN7407N SN7417 SN7417D
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

SN7407P

Abstract: sn7407n
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

Contextual Info: SN54178, SN74178 4-BIT PARALLEL-ACCESS SHIFT REGISTERS DECEMBER 1 9 7 2 -R E V IS E D M A RCH 1988 Typical Maximum Clock Frequency . . 39 M H z S N 6417 8 . . . J OR W PACKAGE TOP VIEW Three Operating Modes: Synchronous Parallel Load Right Shift Hold (Do Nothing)

1N3064

Abstract: ISN54179 SN54178 SN74178 SRG4 sn64179
Contextual Info: SN54178, SN 74178 4-BIT P A R A LL E L -A C C E S S SHIFT REGISTERS SDLS070 DECEMBER 1 9 7 2 - REVISED MARCH 1988 Typical Maximum Clock Frequency . . . 39 MHz S N 5 4 1 7 8 . . . J OR W PACKAGE TOP VIEW Three Operating Modes: Synchronous Parallel Load Right Shift

JM38510/01405BEA

Abstract: M38510
Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated

Contextual Info: SN54173, SNS4LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS OCTOBER 1 9 7 6 —REVISED M ARCH 1 9 8 8 SN54173. SN54LS173A . . . J OR.W PACKAGE SN74173 . . . N PACKAGE SN74LS173A . . . D OR N PACKAGE 3-State Outputs Interface Directly with

Contextual Info: SN54173, SN54LS173A, SM74173, SN74LS173A 4 BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS OCTOBER 1 9 7 6 —REVISED MARCH 198B 3-State Outputs Interface Directly with System Bus S N 5 4 1 7 3 . S N 54LS 173A . . . J O H W PACKAGE S N 7 4 1 7 3 . . . N PACKAGE

ttl 74174

Abstract: SN74174
Contextual Info: TYPES SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR D E C E M B E R 1 9 7 2 - R E V IS E O D E C E M B E R 1983 . . H E X D -T Y P E F L IP - F L O P S

Contextual Info: SN54170, SN54LS170, SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLLECTOR OUTPUTS _ M A R C H 1 9 7 4 - Separate Read/Write Addressing Permits Simultaneous Reading and Writing Fast Access Times . . . Typically 20 ns D2 D3 D4 •

SN54176

Contextual Info: SN54176, SN54177, SN74176, SN74177 35-MHz PRESETTABLE DECADE AND BINARY COUNTERSfLATCHES M A Y 1 9 7 1 - R E V IS E D M A R C H 1988 Reduced-Power Versions of SN54196, SN54197, SN74196, and SN74197 50-MHz Counters S N 54176. SN54 1 7 7 . . . J PACKAGE S N 74176, S N 7417 7 . . . N PACKAGE

sn74ls173an

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

JM38510/01405BEA

Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

74LS series logic gates 3 input or gate

Abstract: LS170 SN54170 SN54LS170 SN54LS670 SN74170 SN74LS170 SN74LS670
Contextual Info: TYPES SN54170, SN54LS170, SN74170, SN74LS170 4-B Y -4 REGISTER FILES WITH OPEN-COLLECTOR OUTPUTS M A R C H 1 9 7 4 —R E V I S E D D E C E M B E R 1 9 8 3 S N S 4 1 7 0 . S N 5 4 L S 1 7 0 . . . J OR W PACKAG E Separate R ead/W rite Addressing Permits Simultaneous Reading and W riting

M38510

Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated