SN7417 Search Results

74170

Abstract: OF IC 74170
Contextual Info: TTL MSI TYPES SN54170, SN54LS170. SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLtECTOR OUTPUTS B U L L E T IN N O , D L -S 7 6 1 1 3 4 9 , M A R C H 1 9 7 4 — R E V IS E D O C T O B E R 1 9 7 6 • Separate Read/Write Addressing Permits Simultaneous Reading and Writing

SN741

Abstract: SN54176
Contextual Info: SN54176, SN54177, SN74176, SN74177 35-MHz PRESETTABLE DECADE AND BINARY COUNTERS/LATCHES M A Y 1 9 7 1 - R E V IS E D M A R C H 1988 Reduced-Power Versions of SN54196, SN 54197, SN74196, and SN74197 50-MHz Counters S N 5 4 1 7 6 , S N 5 4 1 7 7 . . . J PACKAGE

ic 7407

Abstract: IC 7417 specifications ic 7407 2yl1 7407 7417 TTL
Contextual Info: TYPES SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPEN-COLLECTOR HIGH-VOLTAGE OUTPUTS _ Converts TTL Voltage Levels to MOS Levels R E V IS E D D E C E M B E R 1 9 8 3 S N 5407, S N 5417 . . . J OR W PACKAGE S N 7407, S N 7417 . . . J OR N PACKAGE

74179 register ic

Abstract: IC 74178 74179 4 bit shift register
Contextual Info: TYPES SN54178, SN54179, SN74178, SN74179 4-BIT PARALLEL-ACCESS SHIFT REGISTERS D E C E M B E R 1 9 7 2 -R E V IS E D D E C E M B E R 1983 Typical Maximum Clock Frequency . . . 39 MHz • Three Operating Modes: S N 7 4 1 7 8 . . . J OR N P A C K A G E TO P V IE W

74L5

Contextual Info: TYPES SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS OCTOBER 1976 — REVISED APRIL 1985 S N 54173, SN 54LS 173A . . . J OR W PACKAGE S N 7417 3 . . . J OR N PACKAGE S N 74L5 173A . . . D, J OR N PACKAGE 3-State Outputs Interface Directly w ith

2D 1002 integrated circuit

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

SN74171

Abstract: SN5407 SN5417 SN7407 SN7407D SN7407DR SN7407N SN7417 SN7417D SN7417DR
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

SN7407N equivalent

Abstract: 7407 TTL SN5407 SN5417 SN7407 SN7407D SN7407DR SN7407N SN7417 SN7417D
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

SN7407P

Abstract: sn7407n
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

Contextual Info: SN54178, SN74178 4-BIT PARALLEL-ACCESS SHIFT REGISTERS DECEMBER 1 9 7 2 -R E V IS E D M A RCH 1988 Typical Maximum Clock Frequency . . 39 M H z S N 6417 8 . . . J OR W PACKAGE TOP VIEW Three Operating Modes: Synchronous Parallel Load Right Shift Hold (Do Nothing)

JM38510/01405BEA

Abstract: M38510
Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated

SN74C164N

Abstract: SN74165N SN74167N SN74173N SN74164N B119 SN74C167N SN74S170N B115 B118
Contextual Info: Semiconductors Connection Diagrams B115 Vcc Bit 6 °H Og °F °E C LR C LK SN74165N SN74L165N/SN74C165N t-b it shift register Vcc E N A B B117 B118 SN74164N SN74C164N 8-bit sh ift register D C B A IN PU T H °H G F E Vcc RATE / -IN P U T S -\ B119 SN74170N

SN74177N

Abstract: 8126 b126 B121 B122 B123 B124 B125 SN74174N SN74175N
Contextual Info: Semiconductors Connection Diagrams B121 C LR B122 B124 SN74174N H ex D typ e flip-flop OUT IN IN SN74177N B in a ry counter DATA IN PU TS OUT IN OUT GND SN74175N Quad D type flip-flop B125 SN74180N 8-bi t parity g enerator/checker 5 7 4 3 2 1 EVEN ODD 2 Z

SN7407N equivalent

Abstract: SNJ5407FK SN74171 SN7417 SN7417NE4 SN7407J SN5407 SN7407 SN7407D SN7407DR
Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

SN74112

Abstract: SN74172 1972-REVISED register file L817
Contextual Info: SN74172 16-BIT MULTIPLE-PORT REGISTER FILE WITH 3-STATE OUTPUTS MAY 1972—REVISED MARCH 1988 SN 74172 . . . N PACKAGE Independent Read/Write Addressing Permits Simultaneous Reading and Writing • T O P V IE W 1W 1 C 1 L ^ 2 4 D v c c 23 Ü 1 W 2 1W 0 C 2

register SN74LS173A

Abstract: SN54173 SN54LS173A SN74173 SN74LS173A
Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

register SN74LS173A

Abstract: SN54173 SN54LS173A SN74173 SN74LS173A
Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE

SN54176J

Abstract: SN74177N SNJ54176J
Contextual Info: PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 PACKAGING INFORMATION Orderable Device Status 1 Package Type Package Drawing Pins Package Eco Plan (2) Qty Lead/Ball Finish MSL Peak Temp (3) SN54176J OBSOLETE CDIP J 14 TBD Call TI Call TI SN74177N OBSOLETE

Contextual Info: SN54170, SN54LS170, SN74170, SN74LS170 4-BY-4 REGISTER FILES WITH OPEN-COLLECTOR OUTPUTS SDLS065 – MARCH 1974 – REVISED MARCH 1988 Copyright  1988, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments

Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated

M38510/01702BEA

Abstract: M38510
Contextual Info: SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A – DECEMBER 1972 – REVISED OCTOBER 2001 Copyright  2001, Texas Instruments Incorporated

SN7417

Contextual Info: SN5407, SN5417, SN7407, SN7417 HEX BUFFERS/DRIVERS WITH OPENĆCOLLECTOR HIGHĆVOLTAGE OUTPUTS SDLS032G − DECEMBER 1983 − REVISED MAY 2004 D Convert TTL Voltage Levels to MOS Levels D High Sink-Current Capability D Input Clamping Diodes Simplify System

Contextual Info: SN54173, SN54LS173A, SN74173, SN74LS173A 4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS SDLS067A – OCTOBER 1976 – REVISED JUNE 1999 D D D TYPE TYPICAL PROPAGATION DELAY TIME MAXIMUM CLOCK FREQUENCY ’173 23 ns 35 MHz ’LS173A 18 ns 50 MHz description SN54173, SN54LS173A . . . J OR W PACKAGE