SMC18 Search Results

c1842

Abstract: SMC HF 270
Contextual Info: Ceramic Packaged Surface Mount PIN Diodes SMC1800 Series Features • Industry Standard Outline ■ Hermetically Sealed Ceramic Package ■ Non-Rollable Surface Mount Design ■ Full Face PIN diode Chip Bond ■ For High Performance Switches and Attenuators

hec capacitor

Abstract: 501P48W155KJ4 capacitor 100V hec 201P48W485KJ4 755 cap CAPACITOR HEC Holystone 500P08W225 L 114
Contextual Info: Cross Reference Guide: AMC PXX Series to HolyStone SMC Series Stacked Caps www.holystonecaps.com 1825 Size AMC P/N* HEC P/N Comment Part Number * As per catalogue 2008 25V rating Explained: 250P09N563KJ4 SMC18JN563K050TN 250P29N114KJ4 SMC28JN114K050TN

IN5767

Abstract: a6121 SMP1321-15 SMP-1312 LTR1701-03 SMP1312-05 SMP1312-01 SMP1312
Contextual Info: Section 6 Control Diodes Numerical Index Part Number Page Part Number Page Part Number Page Part Number Page A60001P420 6-24 APD5070-023-001 6-10 DSB6484-02 6-31 SMC1891 6-7 A60002P420 6-24 APD7720-00 6-9 DSB6484-03 6-31 SMP1302-11 6-4 A60003P420 6-24 APD7720-023-001

Contextual Info: COAXIAL RESONATOR OSCILLATOR SURFACE MOUNT MODEL: SMC1818N ULTRA LOW-NOISE 1877-1889 MHz SPECIFICATIONS Oscillator Frequency Range: Tuning Voltage: Tuning Sensitivity: Output Power: Bias Voltage: Harmonic Suppression: 1877-1889 MHz 1 to 9 V Max 3 to 5 MHz/V (Typ)

SMC1802-201

Abstract: C1871 SMC1817-201 IR diodes hf 5 SMC1802 mc1891
Contextual Info: Ceramic Packaged Surface Mount PIN Diodes ESA lpha SMC1800 Series Features • Industry Standard Outline ■ Hermetically Sealed Ceramic Package ■ N on-R ollable Surface Mount Design ■ Full Face PIN Diode Chip Bond ■ For High Performance Switches and Attenuators

C1871

Contextual Info: Ceramic Packaged Surface Mount PIN Diodes SMC1800 Series Features • Industry Standard Outline ■ Hermetically Sealed Ceramic Package ■ Non-R ollable Surface Mount Design ■ Full Face PIN diode Chip Bond ■ For High Performance Switches and Attenuators

m1 250c fuse

Abstract: at32uc3c em 234 stepper dtx 370 DTH block diagram lta 301 VT 546 Modem basic circuit diagram EIC 4021 shift registers 4050
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

AT91SAM3U4

Abstract: at91sam3 1N1308 MAR 735 REGULATOR IC 7912 pin identify AT91SAM3U4E SAM3u1 AT91SAM3U 3961 G.E 0x20180
Contextual Info: Features • Core • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 96 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Memories – From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,

GCM 38112

Abstract: Wifi to I2C ST ATUC3A4256S AT32UC3A3 dsp ssb modulation demodulation barcode reader using avr AT32UC3A64 ATUC3A3256 DesignWare Hi-Speed USB On-The-Go Controller AT32UC3A3256S
Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

DS1304

Abstract: aem r10k SMP3316-103M ds1303 renco 4r7 SMTDR54-120M smtdr75 SMTDR75-680K SMTDR75-221K MLF1608A1R0KT
Contextual Info: Bourns P/N CI100505-1N0D CI100505-1N2D CI100505-1N5D CI100505-1N8D CI100505-2N2D CI100505-2N7D CI100505-3N3D CI100505-3N9D CI100505-4N7D CI100505-5N6D CI100505-6N8J CI100505-8N2J CI100505-10NJ CI100505-12NJ CI100505-15NJ CI100505-18NJ CI100505-22NJ CI100505-27NJ

DFSDM

Abstract: SAM9M10 K 2141 AC97 ARM926EJ-S AT91SAM ISO7816 NBC 3111 hc 541 rfid reader id-20
Contextual Info: Features • 400 MHz ARM926EJ-S ARM Thumb® Processor – 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU • Memories • • • • – DDR2 Controller 4-bank DDR2/LPDDR, SDR/LPSDR – External Bus Interface supporting 4-bank DDR2/LPDDR, SDR/LPSDR, Static

0x1000000

Abstract: RF cmos LNA ATSAM3S8CA-AU CI 4046 RS232 Wireless Bluetooth Transceiver 0x4143 ATSAM3S l 7135 SD812 DSAASSA000857.
Contextual Info: Features • Core • • • • • • • – ARM Cortex®-M3 revision 2.0 running at up to 64 MHz – Memory Protection Unit MPU – Thumb®-2 instruction set Pin-to-pin compatible with AT91SAM7S legacy products (64-pin versions), SAM3S4/2/1 products

Contextual Info: ARM-based Embedded MPU SAM9G35 DATASHEET Description The SAM9G35 is a member of the Atmel series of 400 MHz ARM926EJ-S embedded MPUs that support high bandwidth communication and advanced user interfaces and are optimized for industrial applications such as building automation,

PX3-2

Abstract: AT32UC3A0256 128f 385P AT32UC3A0512
Contextual Info: Features • High Performance, Low Power 32-Bit Atmel AVR® Microcontroller • • • • • • • • • • • • • • • • – Compact Single-cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

RF 351

Abstract: multi format memory card reader KPS seven segment display SMC62 AC97 AT32AP7001 AVR32 Pin connection of bk 1085 HS 153 SP "BANDGAP REFERENCE" cross
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

A 434 RF Receiver TRANSMITTER PAIR

Abstract: AT45DB161B pam 8304 bcfk AUTOMATIC ROOM LIGHT CONTROLLER using ldr abstract AT91RM9200 SDRAM XC-01
Contextual Info: Features • Incorporates the ARM920T ARM Thumb® Processor • • • • • • • • • • • • • • • • – 200 MIPS at 180 MHz, Memory Management Unit – 16-KByte Data Cache, 16-KByte Instruction Cache, Write Buffer – In-circuit Emulator including Debug Communication Channel

Contextual Info: Features • Core • • • • • • – ARM926EJ-S ARM Thumb® Processor running at up to 400 MHz @ 1.0V +/- 10% – 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit Memories – One 64-Kbyte internal ROM embedding bootstrap routine: Boot on NAND Flash,

ARM7TDMI System Peripherals

Abstract: program key lock ic 4013 154WA SAM7SE512 at91sam7sexx
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – EmbeddedICE In-circuit Emulation, Debug Communication Channel Support

ATMEL 910

Abstract: atmel910 SMC911 hsb 772 p interface bluetooth with AVR ptz decoder AC97 AT32AP7000 AVR32 rf mems switch
Contextual Info: Features • High Performance, Low Power AVR 32 32-Bit Microcontroller • • • • • • • • • • • • • • • • • • • – 210 DMIPS throughput at 150 MHz – 16 KB instruction cache and 16 KB data caches – Memory Management Unit enabling use of operating systems

Contextual Info: Features • Core • • • • • • • – ARM926EJ-S ARM Thumb® Processor running at up to 400 MHz @ 1.0V +/- 10% – 16 Kbytes Data Cache, 16 Kbytes Instruction Cache, Memory Management Unit Memories – One 64-Kbyte internal ROM embedding bootstrap routine: Boot on NAND Flash,

Atmel sam3x smc sram

Contextual Info: Features • Core • • • • • • • – ARM Cortex®-M4 with a 2 Kbytes cache running at up to 120 MHz – Memory Protection Unit MPU – DSP Instruction Set – Thumb®-2 instruction set Pin-to-pin compatible with SAM3N, SAM3S products (64- and 100- pin versions) and

Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller • • • • • • • • • • • • – Compact Single-Cycle RISC Instruction Set Including DSP Instruction Set – Read-Modify-Write Instructions and Atomic Bit Manipulation

Contextual Info: Features • High Performance, Low Power 32-bit AVR Microcontroller – – – – • • • • • • • • • • • • Compact Single-cycle RISC Instruction Set Including DSP Instruction Set Built-in Floating-Point Processing Unit FPU Read-Modify-Write Instructions and Atomic Bit Manipulation

6242E

Abstract: 4583 dual schmitt trigger 6242b la 4508 ic pin diagram R1100D121C AT91Bootstrap CS 5609 ARM926EJ-S ISO7816 5609 dec
Contextual Info: Features • Incorporates the ARM926EJ-S ARM Thumb® Processor • • • • • • • • • • – DSP Instruction Extensions – ARM Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer