SIGNETICS DIVIDE BY N Search Results

ci 7492

Abstract: 7492 counter TTL 7492 7492 binary counter 7492 74LSS2 ci+7492
Contextual Info: 7492, LS92 Signetics Counters Divide-By-Twelve Counter Product Specification Logic Products DESCRIPTION The '92 is a 4-bit, ripple-type Divide-by12 Counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

74ls290

Contextual Info: 74LS290 Signetics Counter Decade Counter Product Specification Logic Products DESCRIPTION The '290 is a 4-bit, ripple type decade counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­ tion and a divide-by-five section. Each

1GHz PRESCALER

Abstract: sab1165 1GHz Oscillator sab1164 Anzac H-183-4 SAB1165N 1GHZ DIVIDE BY 64 PRESCALER FL-1Ghz prescaler 64 sot97a
Contextual Info: SAB1164/65 Signetics 1GHz Divide-by-64 Prescaler Product Specification Linear Products PIN CONFIGURATION DESCRIPTION FEATURES This silicon monolithic integrated circuit is a prescaler in current-mode logic. It contains an amplifier, a divide-by-64 scaler and an output stage. It has been

Contextual Info: Signetics 74LS293 Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

ic 7493 truth table

Abstract: logic diagram of ic 7493 circuit diagram of ic 7493 LM 7493 INTERNAL DIAGRAM OF IC 7493 pin diagram of ic 7493 IC 7493 4bit Binary Counter 7493 flip-flop counter IC 7493 configuration ic 7493
Contextual Info: 7493, LS93 Signetics Counters 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The ’93 is a 4-bit, ripple-type Binary Counter. The device consists of four master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

74LS293 Asynchronous counter

Contextual Info: 74LS293 Signetics Counter 4-Bit Binary Ripple Counter Product Specification Logic Products DESCRIPTION The '293 is a 4-bit ripple type binary counter. The device consists of tour master-slave flip-flops internally con­ nected to provide a divide-by-two sec­

dual 4 bits decade counter

Abstract: 74LS390
Contextual Info: 74LS390 Signetics Counter Dual Decade Ripple Counter Product Specification Logic Products FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-by-2, 4, S, 10, 20, 25, 50 or 100 • Two Master Resets to clear each decade counter individually

Contextual Info: 74LS390 Signetics Counter Dual Decade Ripple Counter Product Specification Logic Products FEATURES • Two BCD decade or bi-quinary counters • One package can be configured to divide-by-2, 4, 5, 10, 20, 25, 50 or 100 • Two Master Resets to clear each decade counter individually

N8X3

Contextual Info: Signetics 8X360 Memory Address Director MAD Product Specification Microprocessor Products DESCRIPTION FEATURES The 8X360 Memory Address Director (MAD) (Figure 1), is a high-speed, per­ formance oriented peripheral. The 8X360 reduces bookkeeping and soft­

MICROPROCESSOR 68000

Abstract: scn68000 SF4 357 signetics 68000 32bu 48DIP a231 ax hen no berh signetics 1016 16X16
Contextual Info: S i g n e t ic s 68000 16-/32-Bit Microprocessor Product Specification Military Customer Specific Products DESCRIPTION The 68000 is the first implementation of the 6800016/32 bit microprocessor archi­ tecture. The 68000 has a 16-bit data bus and 24-bit address bus, w hilethefull archi­

SCN68454

Abstract: SCB68459CAN20 scb68459 ST-500 PHASE LOCKED LOOP
Contextual Info: Signetics SCB68459 Disk Phase Locked Loop DPLL Preliminary Specification Microprocessor Products PIN CONFIGURATION DESCRIPTION FEATURES The SCB68459 Disk Phase Locked Loop (DPLL) is a bipolar device that complements the SCN68454 Intelligent Multiple Disk Controller (IMDC). Togeth­

555 missing pulse detector circuit

Abstract: pulse position modulation using 555 555-TIMER Signetics 555 timer 555 TIMER APPLICATIONS signetics 555 555 missing pulse detector NE555V delay timer circuit diagram 555 555ne
Contextual Info: S ig im tiE S tim e r 555 LINEAR INTEGRATED CIRCUITS DESCRIPTION The NE/SE 555 m onolithic tim ing circuit is a highly stable controller capable o f producing accurate tim e delays, or oscillation. Additional terminals are provided fo r triggering or resetting if desired. In the time delay mode o f operation,

80C451

Abstract: 02060H
Contextual Info: Signetics SC96AH Series Single-Chip 16-Bit Microcontrollers Preliminary Specification Microprocessor Products DESCRIPTION T h e SC 96A H Series microcontrollers consist of a powerful 16-bit CPU tightly coupled with 8K bytes of program mem­ ory, 232 bytes of data memory and I/O

Contextual Info: Product specification SlgnetlcsMilitary Microprocessor Products Enhanced programmable communications interface EPCI 68661/2661 NO TIC E: This product is non-compliant to MlL-STD-883. DESCRIPTION - 5- to 6-bit characters plus parity The Signetics 68661 EPCI is a universal

sem 2105 16 pin

Abstract: sem 2106 diagram "capacitive keyboard" SCN2671AC1I40 scn2671ac1n40 d
Contextual Info: S ig n e t ic s S C N 2 6 7 4 I Programmable Keyboard and Communication Controller PKCC Microprocessor Products DESCRIPTION The Signetics SCN2671 Programmable Keyboard and Communications Control­ ler (PKCC) is a M OS LSI device which provides a versatile keyboard encoder

volgers

Abstract: 74HC4046A 74HC-HCT4046A AN12 CS61574 CS61574A CS61575 AN12REV2 Stratum 3 digital PLL Phase-locked loop circuits
Contextual Info: AN12 Application Note AT&T 62411 Design Considerations Jitter and Synchronization By Bob Bridge SYNCHRONIZATION OF DIGITAL NETWORKS INTRODUCTION This application note outlines the technical requirements which must be considered when designing a system to meet the AT&T 62411 synchronization and jitter requirements. The first

shortwave radio pll control IC

Abstract: AN1671/MC145170 AN969 motorola ML145158-5P philco 260 mc145158p2 vhf fsk modem ic 16 to 4 encoder ic DUAL CONVERSION NARROWBAND FM RECEIVERS motorola LOW POWER DUAL CONVERSION FM TRANSCEIVER
Contextual Info: Table of Contents Introduction Page A Message from the President . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii Important Note . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv

uP1514

Abstract: CD4066 PIN DIAGRAM CD4066 DATASHEET CD4066 CD4066 Types HARRIS CD4066 CD4066 equivalent 988080 analog transistor a608 A608
Contextual Info: Harris Semiconductor No. AN9703.1 Harris Digital August 1997 Interfacing a Harris CDP68HC05 with an I2C Serial DAC and the Port A Tone Options Author: Christopher Mazzanti Introduction MAX519. Since a full implementation of the I2C bus protocol as defined by Phillips is beyond the scope of this application

Contextual Info: FEATURES PIN CONFIGURATION • • • • • . FREQUENCY MULTIPLICATION AND DIVISION SIGNAL CONDITIONING AND SIDE-BAND SUPPRESSION FM DEMODULATION WITHOUT TUNED CIRCUITS NARROW BANDPASS — TO ±1% ADJUSTABLE TRACKING RANGE — TO ±15% EXACT FREQUENCY DUPLICATION IN HIGH NOISE ENVI­

60c31

Abstract: AD347 AD7ME 80C31BH 80C31BH/BQA
Contextual Info: Signetics 80C31BH/80C51BH CMOS Single-Chip 8-Bit Microcontroller Product Specification Military Microprocessor Products DESCRIPTION The Signetics 80C31BH/80C51BH is a high-performance microcontroller fabri­ cated with Signetics high-density CMOS technology.

3DA18

Abstract: AOXA scn680 SCN68000 SCN68000C6A68 SCN68000C6I64 SCN68000C6N64 SCN68000C8I64 SCN68000CAI64 SCN68000CAN64
Contextual Info: Mullard U Originally published by Signetics FEBRUARY 1985 SCN68000 16-Bit Microprocessor Product Specification DESCRIPTION PIN CONFIGURATION The SCN68000 is the first in a family of a d v a n c e d m ic ro p ro c e s s o rs fro m Signetics. Utilizing VLSI technology, the

ne562

Abstract: Signetics NE562 NE562N
Contextual Info: NE562-N DESCRIPTION PIN CONFIGURATION The NE562 Phase Locked Loop I PLL is a m onolithic signal conditioner and demodu­ lator system comprising a VCO, phase com­ parator. am plifier and low pass filter, inter­ connected as shown in the accompanying block diagram. The center frequency of the

scn68230

Abstract: SCN68230CAN48 scn6823 SCN68230C8N48 IC LA 4127 68230
Contextual Info: JANUARY 1983 MICROPROCESSOR DIVISION PARALLEL INTERFACE/TIMER S C N 68230 P re lim in a r y DESCRIPTION The SCN68230 Parallel In terface/T im er Pl/T provides ve rsatile d ouble buffered parallel Inte rfa ce s and an ope ra tin g sys­ tem oriented tim e r to S68000 system s. The

NE538

Abstract: riaa eq current booster schematic schematic diagram UPS ica
Contextual Info: Operational Amplifiers INTRODUCTION THE PRACTICAL AMPLIFIER Th e o p e ra tio n a l a m p lifie r was firs t in tro ­ du ced in the e a rly 1940’s. P rim a ry usage o f these vacu um tu b e fo re ru n n e rs o f the ideal ga in b lo c k w as in c o m p u ta tio n a l c irc u its .