SCLS192 Search Results

SN54LV174

Abstract: SN74LV174
Contextual Info: SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74LV174

Contextual Info: SN74LV174 HEX D-TYPE FLIP-FLOP WITH CLEAR SCLS192-FEBRUARY 1993-R E V IS E D MARCH 1994 • EP/C Enhanced-Performance Implanted CMOS 2-|x Process D, DB, OR PW package <TOP VIEW> • Typical V q l p (Output Ground Bounce) < 0.8 V at VGc = 3.3 V, TA = 25°C

Contextual Info: SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV174

Abstract: SN74LV174 SN74LV174D SN74LV174DBLE SN74LV174DR SN74LV174PWLE
Contextual Info: SN54LV174, SN74LV174 HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS192B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV174

Abstract: SN74LV174
Contextual Info: SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174, SN74LV174 HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS192B − FEBRUARY 1993 − REVISED APRIL 1996 D EPIC  Enhanced-Performance Implanted D D D D CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74ALVCH162245

Abstract: Schottky Barrier Diode Bus-Termination Array SN7400 CLOCKED SLLS210 SCAD001D TEXAS INSTRUMENTS SN7400 SERIES buffer SN74LVCC4245 sn74154 SDAD001C SN7497
Contextual Info: Section 4 Logic Selection Guide ABT – Advanced BiCMOS Technology . . . . . . . . . . . . . . . . . . . . . . . . . . 4–3 ABTE/ETL – Advanced BiCMOS Technology/ Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–9

SN74HC02 Spice model

Abstract: philips semiconductor data handbook SDAD001C SDFD001B SCAD001D SN7497 spice model SN74AHC14 spice Transistor Crossreference SLLS210 ci ttl sn74ls00
Contextual Info: LOGIC OVERVIEW 1 FUNCTIONAL INDEX 2 FUNCTIONAL CROSSĆREFERENCE 3 DEVICE SELECTION GUIDE 4 3 LOGIC SELECTION GUIDE FIRST QUARTER 1997 IMPORTANT NOTICE Texas Instruments TI reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest

SN74LV174

Contextual Info: SN74LV174 HEX D-TYPE FLIP-FLOP WITH CLEAR S C L S 1 9 2 A - FEBR UARY 1 9 9 3 - REVISED JULY 1995 • E P IC Enhanced-Performance Implanted CMOS 2-|x Process • Typical V q l p (Output Ground Bounce) < 0.8 V at Vcc = 3.3 V, TA = 25°C D, DB, OR PW PACKAGE