SN74LV174 Search Results

Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV174A

Abstract: SN74LV174A
Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A
Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401D – APRIL 1998 – REVISED JANUARY 2001 D D D D D D SN54LV174A . . . J OR W PACKAGE SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74LV174A

Abstract: A115-A C101 SN54LV174A
Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401D – APRIL 1998 – REVISED JANUARY 2001 D D D D D D SN54LV174A . . . J OR W PACKAGE SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401B - APRIL 1998 - REVISED JULY 1998 EPIC Enhanced-Performance Implanted CMOS Process Typical V q l p (Output Ground Bounce) < 0.8 V at V C c , Ta = 25°C SN54LV174A . . . J OR W PACKAGE SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN54LV174

Abstract: SN74LV174
Contextual Info: SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

SN74LV174

Contextual Info: SN74LV174 HEX D-TYPE FLIP-FLOP WITH CLEAR SCLS192-FEBRUARY 1993-R E V IS E D MARCH 1994 • EP/C Enhanced-Performance Implanted CMOS 2-|x Process D, DB, OR PW package <TOP VIEW> • Typical V q l p (Output Ground Bounce) < 0.8 V at VGc = 3.3 V, TA = 25°C

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401F − APRIL 1998 − REVISED DECEMBER 2004 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401C – APRIL 1998 – REVISED MAY 2000 D D D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A SN74LV174AD
Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)

A115-A

Abstract: C101 SN54LV174A SN74LV174A
Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401D – APRIL 1998 – REVISED JANUARY 2001 D D D D D D SN54LV174A . . . J OR W PACKAGE SN74LV174A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 2-V to 5.5-V VCC Operation Typical VOLP (Output Ground Bounce)

Contextual Info: SN54LV174A, SN74LV174A HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS401B – APRIL 1998 – REVISED JULY 1998 D D D D D EPIC  Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR SCLS192B – FEBRUARY 1993 – REVISED APRIL 1996 D D D D D EPIC  Enhanced-Performance Implanted CMOS 2-µ Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot)

Contextual Info: SN54LV174A, SN74LV174A HEX DĆTYPE FLIPĆFLOPS WITH CLEAR SCLS401G − APRIL 1998 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 8.5 ns at 5 V D Typical VOLP Output Ground Bounce D D D <0.8 V at VCC = 3.3 V, TA = 25°C Typical VOHV (Output VOH Undershoot)