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    SCAS590 Search Results

    SCAS590 Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original
    cdc31910-linescas5901-to-10+4mil-std-88328-pincdc319dbrcdc319ibis PDF

    CDC319

    Abstract: CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+7mil-std-88328-pincdc319dbcdc319dbg4cdc319dbrcdc319dbrg4mo-150 PDF

    CDC319

    Abstract: MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+3mil-std-88328-pinmo-150 PDF

    CDC319

    Abstract: MO-150
    Contextual Info: CDC319 l-LINE TO 10-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SCAS590 - DECEMBER 1997 High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tSk(0), Less Than 250 ps Pulse Skew, tSk(P), Less Than 500 ps


    OCR Scan
    cdc31910-linescas5901-to-10+3mil-std-88328-pinmo-150 PDF

    MO-150

    Abstract: CDC319
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original
    cdc31910-linescas5901-to-10+3mil-std-88328-pinmo-150 PDF

    CDC319

    Abstract: CDC319DB CDC319DBG4 CDC319DBR CDC319DBRG4 MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+7mil-std-88328-pincdc319dbcdc319dbg4cdc319dbrcdc319dbrg4mo-150 PDF

    CDC319

    Abstract: MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original
    cdc31910-linescas5901-to-10+3mil-std-88328-pinmo-150 PDF

    CDC319

    Abstract: CDC319DB CDC319DBR CDC319DBRG4 MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+6mil-std-88328-pincdc319dbcdc319dbrcdc319dbrg4mo-150 PDF

    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+2mil-std-88328-pin PDF

    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps


    Original
    cdc31910-linescas5901-to-10+4mil-std-88328-pincdc319dbrcdc319ibis PDF

    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+2mil-std-88328-pin PDF

    CDC319

    Abstract: MO-150
    Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590A – DECEMBER 1997 – REVISED OCTOBER 2001 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps


    Original
    cdc31910-linescas590a1-to-10+3mil-std-88328-pinmo-150 PDF