CDC319IBIS Search Results
CDC319IBIS Datasheets Context Search
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Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps |
Original |
CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin scas590 CDC319DBR CDC319IBIS | |
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Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps |
Original |
CDC319 10-LINE SCAS590 1-to-10 MIL-STD-883, 28-Pin scas590 CDC319DBR CDC319IBIS |