SCAN18373 Search Results

Contextual Info: S E M IC O N D U C T O R T SCAN18373T Transparent Latch with 3-STATE Outputs General Description Features The S C A N 18373T is a high speed, low -pow er transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable con­

Contextual Info: OBSOLETE SCAN18373T www.ti.com SNLS036B – SEPTEMBER 1998 – REVISED APRIL 2013 SCAN18373T Transparent Latch with Tri-State Outputs Check for Samples: SCAN18373T FEATURES DESCRIPTION • • • The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs

SCAN18373T

Abstract: SCAN1837TSSC
Contextual Info: Revised May 2000 SCAN18373T Transparent Latch with 3-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9bit bytes with byte-oriented latch enable and output enable

Contextual Info: March 1994 Semiconductor SCAN18373T Serially Controlled Access Network Transparent Latch with TRI-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit

Contextual Info: 18373T National Semiconductor SCAN18373T Transparent Latch with TRI-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable

SCAN18373T

Contextual Info: SCAN18373T Transparent Latch with TRI-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with

scan18373

Abstract: C1995 SCAN18373T SCAN18373TFMQB SCAN18373TSSC SCAN18373TSSCX
Contextual Info: SCAN18373T Serially Controlled Access Network Transparent Latch with TRI-STATE Outputs General Description Features The SCAN18373T is a high speed low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable

Contextual Info: 18373T ß National Semiconductor SCAN18373T Transparent Latch with TRI-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable

BU 2735 AS

Abstract: SMD A06 5962-9311801MXA SCAN18373T SCAN18373TFMQB SCAN18373TSSC SCAN18373TSSCX AI-431 18373TSSC
Contextual Info: S E M IC O N D U C T O R T SCAN18373T Transparent Latch with 3-STATE Outputs General Description Features T h e S C A N 1 8 3 7 3 T is a h igh s p e e d , lo w -p o w e r tra n s p a re n t la tch fe a tu rin g s e p a ra te d a ta in p u ts o rg a n iz e d in to dua l 9 -b it

SCAN18373T

Abstract: SCAN18373TFMQB
Contextual Info: MICROCIRCUIT DATA SHEET Original Creation Date: 10/23/98 Last Update Date: 12/11/98 Last Major Revision Date: SCAN18373T-X REV 1A0 SERIALLY CONTROLLED ACCESS NETWORK TRANSPARENT LATCH WITH TRI-STATE OUTPUTS General Description The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs

SCAN18373TSSCX

Abstract: SCAN18373T 5962-9311801MXA SCAN18373TFMQB SCAN18373TSSC
Contextual Info: SCAN18373T Transparent Latch with 3-STATE Outputs General Description Features The SCAN18373T is a high speed, low-power transparent latch featuring separate data inputs organized into dual 9-bit bytes with byte-oriented latch enable and output enable control signals. This device is compliant with IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture with

Mil JAN jm38510 Cross Reference

Abstract: JM38510 5962-8997001PC 5962-87572 5962-8991101XC DS16F95QMLV 75202 jm3851030402bca 5962-9203001MPC 7900801CA
Contextual Info: NATIONAL SEMICONDUCTOR STANDARD MICROCIRCUIT DRAWING CROSS REFERENCE NATIONAL SEMICONDUCTOR STANDARD MICROCIRCUIT DRAWING CROSS REFERENCE 1/16/98 Part Numbering Guides Jan Product: JM38510 / 119 05 B P A MIL-M-38510 Basic Specification Lead Finish A = Solder, C = Gold

analog devices die list

Abstract: 54AC245 74ACT04 LM108 LM137K SCAN18373T SCAN18374T SCANPSC100F SCANPSC110F
Contextual Info: N VOLUME NO. 2 1999 BARE DIE USE IS GROWING RAPIDLY CONTENTS he rapid demand for smaller and PAGE 1 Bare Die Use is Growing BARE DIE MEET smaller consumer products is Rapidly pushing designers and manufacQUALITY, RELIABILITY, Page 2 Boundary Scan Assists turers to reassess their selection of comAND PERFORMANCE

SN54LVT18502

Abstract: SN54ABT8245 SN54ABT8543 SN54ABTH18502A SN54BCT8240A SN54BCT8244A SN54BCT8245A SN54BCT8373A SN74ABT18245A SN74ABT18502
Contextual Info: Using ispGDX to Replace Boundary Scan Bus Devices the I/O cells make almost any TTL-bus application possible, especially with the 3.5ns Tpd and Tco of the 3.3V ispGDXV devices. After a brief overview of the ispGDX architecture, several examples illustrating the use of the

jm38510

Abstract: JD5417BCA 54ACT3301W-QML 54ACT3301 JD5403BCA 5962-8752401PA JD54174BEA 5962-9958101QXC JD5407BCA JD54F157BEA
Contextual Info: N STANDARD MICROCIRCUIT DRAWING CROSS REFERNCE and NOTES May 2000 N STANDARD MICROCIRCUIT DRAWING PART NUMBERING GUIDE JAN or MIL-M-38510 J M 3 8 5 1 / 1 1 9 05 B MIL-M-38510 Specification P A Lead finish A=solder,C-gold Radiation Assurance Indicator / M

FQPF*7N65C APPLICATIONS

Abstract: bc548 spice model bf494 spice model spice model bf199 LM3171 BC517 spice model bc547 spice model BF494 spice MOC3043-M spice model SPICE model BC237
Contextual Info: Fairchild PSG.book Page i Wednesday, July 28, 2004 11:12 AM Fairchild Semiconductor Product Catalog Rev. 1 Analog & Mixed Signal Discrete Power Interface & Logic Microcontrollers Optoelectronics RF Power Front Matter.fm Page ii Monday, August 2, 2004 10:09 AM

mm74c922

Abstract: nte CROSS-REFERENCE SJ 76 A DIODE EMI Quad 2 input nand gate cd 4093 7400 functional cross-reference HST 4047 pinout information of CMOS 4001, 4011, 4070 32-Bit Parallel-IN Serial-OUT Shift Register Fairchild Semiconductor Integrated Circuit Data Catalog 1970 application MM74C926
Contextual Info: Logic Product Catalog Analog Discrete Interface & Logic Optoelectronics July 2002 Across the board. Around the world. Logic Literature Table of Contents Description Literature # Advanced Logic Products Databook CROSSVOLT , Fairchild Switch, TinyLogic™, VHC

cmos s-r latch

Abstract: hex latch 74ACQ373 MM74HC259 hex to 7 segment decoder Multiplexer latch octal S-R latch 74ABT373 74AC373 74AC573
Contextual Info: Logic Products by Function Latch Products Logic Product Family Product Description Package Voltage Node DM93L14 Bipolar-TTL Quad Latch DIP 5 DM74LS75 Bipolar-LS Quad Latch DIP SOIC 5 DM74LS259 Bipolar-LS 8-Bit Serial In to Parallel Out Addressable Latches

jm3851030402bca

Abstract: JM38510 5962-9305501MCC 5962-8958602GA JD55115BEA JD54F08BCA JM54AC373BRA 5962-8762201ea 5962-8757203CA 7800802CA
Contextual Info: NATIONAL SEMICONDUCTOR STANDARD MICROCIRCUIT DRAWING CROSS REFERENCE JULY, 1998 Part Numbering Guides Jan Product: JM38510 / 119 05 B P A MIL-M-38510 Basic Specification Lead Finish A = Solder, C = Gold "/" = Standard, D = 10krad RHA & R = 100krad RHA designation

LM6462

Abstract: LM6464 LM103-3.6 54ACT3301 38510R75001 SMD MARKING CODE ACQ lm1242 MM54HC564 LH0041CJ 54AC00
Contextual Info: N 4 N TABLE OF CONTENTS Included in this guide are the Enhanced Solutions products that are offered by National Semiconductor, their qualification levels, and packages as well as available process flows, radiation testing, and other information that can support your design.

pinout information of CMOS 4001, 4011, 4070

Abstract: 54C922 CGS3301 54HC123A F100K ECL 300 series and design guide 4060 counter 4029 counter MM54HC245 MM54C76 4081 AND gate
Contextual Info: N National Semiconductor offers a broad selection of advanced logic and interface families. Each family uniquely combines certain process and design techniques to address their evolving roles in system design. System & Board Test Products SCAN National’s portfolio of SCAN test products lowers a system’s cost of ownership over the course of its life cycle.

Contextual Info: •M ICO N DUCTO R r General Description Features T h e S C A N 1 8 3 7 3 T is a high s p e e d , lo w -p o w e r tra n s p a re n t ■ IE E E 1149.1 J T A G C o m p lia n t la tch fe a tu rin g s e p a ra te d a ta in p u ts o rg a n iz e d in to d u a l 9 -b it

AN-1023

Abstract: AN-1037 AN-890 SCAN18373T SCAN18540T SCANPSC110F
Contextual Info: Fairchild Semiconductor Application Note November 1995 Revised May 2001 Structural System Test via IEEE Std. 1149.1 with Hierarchical and Multidrop Addressable JTAG Port, SCANPSC110F Introduction IEEE Std. 1149.1 JTAG defines a standard Test Access Port (TAP) protocol and set of commands for built in test at

smd TRANSISTOR code marking w2t

Abstract: MARKING SMD PNP TRANSISTOR w2t w2t smd transistor TRANSISTOR SMD MARKING CODE s2a SMD TRANSISTOR w2w smd marking e2w smd code W2W transistor e2w lm1455 marking code w2T
Contextual Info: N Table of Contents QML Certification .1 National’s Space-Level Product Families .1