S5NS Search Results

Contextual Info: STK10C68-M CMOS nvSRAM High Performance 8K x 8 Nonvolatile Static RAM MIL-STD-833/SMD 5962 - 93056 SimTEH FEATURES DESCRIPTION • 35,45 and 55ns Access Times • 20 and 25ns Output Enable Access The Simtek STK10C68-M is a fast static RAM 35, 45 and S5ns , with a nonvolatile electr'cally-erasable PROM

Contextual Info: TD62307P BIPOLAR DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC U n i t in nun TD62 3 0 7 P LOW SATURATION DRIVER _ Features • Low Saturation Outputs VcE sat = 0 - M a x . @ I O U T “1 2 0 m A • O u t p u t R a t i n g .

8512A

Abstract: A12C A15C KM68512A KM68512AL KM68512ALI KM68512ALI-L KM68512AL-L A2ND
Contextual Info: KM68512A Family CMOS SRAM 64Kx8 bit Low Power CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • • • • • • The KM 68512A fam ily is fabricated by SAM SUNG'S advanced CM O S process technology. The fam ily can support various operating tem perature ragnges

26LS32AC

Abstract: 26LS33AC 26ls32a AM26LS32AM
Contextual Info: AM26LS32AC, AM26LS33AC, AM26LS32AM, AM26LS33AM QUAD DIFFERENTIAL LINE RECEIVERS SLLS115A —D2434, OCTOBER 1980-REV IS ED M A RCH 1993 * AM26LS32A Meets EIA Standards RS-422-A and RS-423-A * AM26LS32A Has ±7-V Common-Mode Range With ±200-mV Sensitivity * AM26LS32A Has ±15-V Common-Mode

Contextual Info: March 1994 L 65664 DATA SHEET 8 K x 8 / 3.3 VOLTS ULTIMATE CMOS SRAM FEATURES . WIDE TEMPERATURE RANGE: - 55 °C TO +125 °C . ASYNCHRONOUS . EQUAL CYCLE AND ACCESS TIME . GATED INPUTS: NO PULL-UP/DOWN RESISTORS ARE REQUIRED . SINGLE SUPPLY 3.3 ± 0.3 VOLTS

Contextual Info: November 1989 Edition 1.1 FUJITSU DATASHEET MB81C1002-70/-80/-10/-12 CMOS 1,048,576 BIT STATIC COLUMN MODE DYNAMIC RAM CMOS 1,048,576 X 1 BIT Static Column Mode Dynamic RAM The Fujitsu MB81C1002 is CMOS fully decoded dynamic RAM organized as 1,048,576 words x 1

STK10C48

Contextual Info: S I MT EK CORP böE D 0274607 □□□□333 EST ISIK STK10C48 SIÎÏ1TEH CMOS nvSRAM High Performance 2K x 8 Nonvolatile Static RAM FEATURES 30,35 and 45ns Access Times 15,20 and 25ns Output Enable Access Unlimited Read and Write to SRAM Hardware s t o r e Initiation

CDFP3-F24

Contextual Info: REVISIONS LTR DATE DESCRIPTION APPROVED YR-MO-DA REV SHEET REV SHEET REV STATUS OF SHEETS PMIC N/A STANDARDIZED MILITARY DRAWING REV PREPARED BY Áf/MMí/éSr¿LLw DRAWING APPROVAL'TJAf 92-08-12 AMSC N/A 11 12 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444

T7 DIODE

Abstract: TD62006P darlington dip 16 DARLINGTON SINK DRIVER npn 10 hfe 2.2v input
Contextual Info: SILICON MONOLITHIC TD62006P/F BIPO LAR DIGITAL INTEGRATED CIRCUIT 6CH DARLINGTON SINK DRIVER The TD62006P, TD62006F Series are high-voltage, highcurrent darlington drivers comprised of si* NPN darlington pairs. All units feature integral clamp diodes for switching

Contextual Info: I l i ^ h l*i i loi i n ,iih c S I 2k x X r>V C M O S Ma sh MiPKOM •■ \ S 2 >M 40 A S I ?.KX<S CMOS f ldsli I I f'KOM Preliminary information Features • Low power consumption • Organization: 512KX8 • Sector architecture - 3 0 m A m a x im u m re a d c u rre n t

CU40026SCPB-S26A

Abstract: ISE Electronics VFD ISE Electronics ESD Mercator CODE CHARACTER FONT CU40026SCP8-S2SA DS-356-0000-00 cu40026scpb NR30 cu40026
Contextual Info: VACUUM FLUORESCENT DISPLAY MODULE SPECIFICATION Model : CU40026SCPB-S26A SPECIFICATION NO. : D S -3 5 6 -0 0 0 0 -0 0 DATE OF ISSUE : Mar., 5 , 1993 REVISION : A ESD MERCATOR SOUTH DENES GT YARMOUTH NORFOLK NR30 3PX TEL 0493 844911 TELEX 81526 FAX 0493 852443

Contextual Info: SN55113, SN75113 DUAL DIFFERENTIAL LINE DRIVERS SLLS07QA—D1315, SEPTEMBER 1 9 7 3 - REVISED FEBRUARY 1993 Choice of Open-Collector, Open-Emitter, or 3-State Outputs High-impedance Output State for Party-Line Applications Single-Ended or Differential AND/NAND

Contextual Info: ELPAQ EMS256K8B A division of ELMO Semiconductor Corp._ 35 - 55ns 2Mb CMOS STATIC SRAM FEATURES * High density SRAM module Pin Configuration Pin Description AO- A17 Address Inputs 1/01 -1/08 D ata Inputs/Outputs • Access time 35 - 55ns

27S12

Abstract: 27128 memory nsc600
Contextual Info: 3IE DApril 1989 V 6 - / 3 - Z .J 27C64 65,536-Bit 8,192 x 8 UV Erasable CMOS PROM Military Qualified General Description Features The 27C64 Is a high-speed 64K UV erasable and electrically reprogrammable CMOS EPROM, ideally suited for applica­ tions where fast turnaround, pattern experimentation and

km6161000blti

Abstract: FTC 960 6161000BL
Contextual Info: KM6161000B Family CMOS SRAM 64Kx16 bit Low Power CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • • • • • • • The KM6161000B family is fabricated by SAMSUNG'S advanced CMOS process technology. The family can support various operating temperature

Contextual Info: DPS32X16A □PM Dense-Pac Microsystems, Inc. O H IG H SPEED 3 2 K X 16 C M O S S R A M P G A M O D U L E PRELIM INARY DESCRIPTIO N: The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 S R A M devices in ceramic LCC packages surface mounted on a co-fired ceramic

Contextual Info: KM681000B Family CMOS SRAM 128Kx8 bit High Speed CMOS Static RAM FEATURE SUMMARY GENERAL DESCRIPTION • Process Technology: 0.6 urn CMOS • Organization: 128K x 8 • Power Supply Voltage : Single 5V +/-10% • Low Data Retention Voltage: 2V Min • Three state output and TTL Compatible

Contextual Info: STK12C68 CMOS nvSRAM 8K x 8 High Performance AutoStore Nonvolatile Static RAM SlfflTEH PRELIMINARY FEA TU R ES DESCRIPTION 30,35 and 45ns A ccess Times 15 mA lCc at 200ns A ccess Speed Automatic STORE to EEPROM on Power Down Hardware or Software initiated

Contextual Info: STK12C68-M CMOS nvSRAM 8K x 8 AutoStore Nonvolatile Static RAM MIL-STD-883 / SMD # 5962-94599 SimTEH FEATURES DESCRIPTION The Simtek STK12C68-M is a fast static RAM 35,45 and 55ns , with a nonvolatile EEPROM element incor­ porated in each static memory cell. The SRAM can be

PJ 52

Abstract: U1615 U18-18 u1515 U23D-43 U176 U21-18 u1818 L115 U218
Contextual Info: Enhanced Memory Systems Inc. DM1M64DT6/DM1M72DT6 Multibank EOO EDRAM 1Mb x fflM b x 72 Enhanced DRAM DIMM Product Specification Features • l 6Kbytes SRAM Cache Memory for 12ns Random Reads Within Eight Active Pages Multibank Cache ■ Fast 8Mbyte DRAM Array for 30ns Access to Any New Page

3246A

Contextual Info: fax id: 5200 CY7C130/CY7C131 CY7C140/CY7C141 CYPRESS 1K x 8 Dual-Port Static RAM Functional Description Features True Dual-Ported memory ceils which allow simulta­ neous reads of the same memory location 1K x 8 organization 0.65-micron CMOS for optimum speed/power

Contextual Info: SN55113, SN75113 DUAL DIFFERENTIAL LINE DRIVERS SLLS07QA—D1315, SEPTEMBER 1 9 7 3 - REVISED FEBRUARY 1993 Choice of Open-Collector, Open-Emitter, or 3-State Outputs High-impedance Output State for Party-Line Applications Single-Ended or Differential AND/NAND

Contextual Info: T EN TA TIV E D A TA 65,536 W O R D x 16 BIT D Y N A M IC RAM DESCRIPTION The TC511665BJ/BZ is the new generation dynamic RAM organized 65,536 words by 16 bits. ^ The TC511665BJ/BZ utilizes TOSHIBA’S CMOS Silicon gate process technology as well as advanced circuit

Contextual Info: DENSE-PAC 1 Megabit C M O S SRAM M IC R O SY ST E M S DPS128M8F/DPS128M8N DESCRIPTION: The DPS128M8 is a monolithic 128K X 8 Static Random Access Memory SRAM fabricated using CM OS technology. It is designed for use in high density, high speed, low power applications. All pins