RS FLIP FLOP Search Results

DTL 9157

Abstract: DTL 950 5 input nand gate dtl DTL Fairchild 937 949 dtl 5 input nand gate DTL Fairchild DTL Fairchild 9109 936 dtl
Contextual Info: FAIRCHILD DIGITAL DTL DTL MICROLOGIC It m Cont’d DEVICE NO. Description Logic/Connection Diagram Packag (s) 1 948 RS Flip-Flop G18 3I,5F,6A,9A 2 949 Quad 2-Input NAND Gate G10 3I,5F,6A,9A 3 950 A-C Coupled RS Flip-Flop G19 3I,5F,6A,9A 4 951 Monostable Multivibrator

RS flip-flop

Abstract: 951 Monostable Multivibrator micrologic rs-flip-flop nand gate DTL Fairchild "power nand gate" 937 fairchild logic gate nand flip-flop 948
Contextual Info: FAIRCHILD DIGITAL - DTL DTL MICROLOGIC Item Cont’d Description DEVICE NO. Logic/Connection Diagram Package(s) 1 948 RS Flip-Flop G18

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

LW046A

Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656C – FEBRUARY 2006 – REVISED APRIL 2007 FEATURES • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

LW046A

Abstract: CD74HC4046 CD4046b A115-A C101 74lv4046 cd4046b application
Contextual Info: SN74LV4046A HIGH-SPEED CMOS LOGIC PHASE-LOCKED LOOP WITH VCO www.ti.com SCES656A – FEBRUARY 2006 – REVISED FEBRUARY 2006 FEATURES • • • • • • • Choice of Three Phase Comparators – Exclusive OR – Edge-Triggered J-K Flip-Flop – Edge-Triggered RS Flip-Flop

TRANSISTOR tr4

Abstract: SP1670 SP1670DG SP1670LC TR23 LC20 TR22
Contextual Info: A FLESSEY W S e m ic o n d u c to rs SP1670 MASTER/SLAVE TYPE D FLIP-FLOP The SP1670 is a D-type Master-Slave Flip-Flop designed for use in high speed digital applications. Master-slave construction renders the SP1670 relatively insensitive to the shape o f the clock waveform, since only the voltage levels at

pj 66 diode

Abstract: pj 57 diode DIODE PJ 57 74175 truth table 1000kA LS175 LS174 ECG74 ECG74174 ECG74175
Contextual Info: S y lv a n ia ECG S e m ic o n d u c to rs ECG74174, LS174, S174, 74175, LS175, S175 Hex/Quad D Flip-Flops with Clear These positive-edge-triggered flip-flop s u tilize T T L c irc u itry to im plem ent D t y p e flip -flo p logic. A ll have a d ire ct clear in p u t, and the quad 1 7 5 versions feature

Difference between LS, HC, HCT devices

Contextual Info: 74HC/HCT4046A MSI PHASE-LOCKED-LOOP W ITH VCO FE A TU R E S • • Low power consumption Centre frequency o f up to • 17 M H z typ. at V c c = 4.5 V Choice o f three phase comparators: E X C L U S IV E -O R ; edge-triggered JK flip-flop; edge-triggered RS flip-flop

4046 application note 9398 649 90011

Abstract: 74HC-HCT4046A 4046 application note 9398 4046 application note pll "9398 649 90011" 4046 as FM demodulator 4046 PLL Designers Guide PLL WITH VCO 4046 9398 961 10061 4046 vco
Contextual Info: 74HC/HCT4046A MSI PHASE-LOCKED LOOP W ITH VCO F E A TU R E S • • • Low power consumption Centre frequency o f up to 17 M H z typ. at V c c = 4.5 V Choice of three phase comparators: E X C L U S IV E -O R ; edge-triggered JK flip-flop; edge-triggered RS flip-flop

TC5018

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC5018P TC5018P 4 BIT BINARY COUNTER WITH CLOCK GENERATOR TC5018P is four digit binary counter equipped with CR oscillator circuit to automatically generate the clock pulse and RS flip-flop to provide the clock

NS-105

Contextual Info: TC5018P C 2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC5018P 4 BIT BINARY COUNTER WITH CLOCK GENERATOR TC5018P is four digit binary counter equipped with CR oscillator circuit to automatically generate the clock pulse and RS flip-flop to provide the clock

Contextual Info: 54ACT11534,74ACT11534 OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS SCASQ38A- D2957, JULY 1987 - REVISED APRIL 1883_ logic diagram positive logic logic symbolt 24 55 rs 13 >C 1 CLK n 1D r i 2 2D _ _ 1Q 1Q 1D •V 20 3 4

T flip flop IC

Abstract: RS flip flop IC 12 V T flip flop IC pin diagram of 7496 ic D flip flop IC ic 7496
Contextual Info: 96 CO NNECTIO N DIAGRAM PINOUT A ' 54/7496 6 / 6l'- l<T 5-BIT SHIFT REGISTER cp DESCRIPTION — The '96 consists of five RS master/slave flip -flop s connec­ ted to perform parallel-to-serial o r serial-to-parallel conversion of binary data. Since both inputs and outputs to all flip -flop s are accessible, parallelin/p ara lle l-ou t o r serial-in/serial-out operation may be performed.

54ALS374

Abstract: smd marking 1331 sot J 3305-1 0946 HC 372a Bipolar IC For Switching Power Supply Contro smd 2U 93 smd marking Q1 mz 54ALS374/BRAJC
Contextual Info: MI L - M - 3 8 5 1 0 / 3 7 2A 12 FEBRUARY 1987_ SUPE RS ED IN G MI L - M- 38 51 0/ 37 2 U SA F 6 Fe bruary 1984 MILITARY MICROCIRCUITS, SPECIFICATION DIGITAL, BIPOLAR, AD VANCED LOW- PO WE R SCHOTTKY T T L , FLIP-FLOPS, CASCADABLE, MONOLITHIC SILICON

HD74LSoop

Contextual Info: • D e c a d e C o u n te rs This counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and divide-by- I BLOCK DIAGRAM five counter. The H D 74LS290 also has gated set-to-nine inputs for use in BCD nine's complement applications. To use the maximum

Contextual Info: S 6 S-THOHSON / r r ^ 7 # 42E D • 7 ^ 2 3 ? D033bm s c s -T H O M s o N ^ijOiH] [liLg Sir^©i^g(gi_ Ei 'B rS 6 T H ' ” T74LS374 OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS ■ EDGE-TRIGGERED D-TYPE INPUTS ■ BU FFER ED POSITIVE EDGE-TRIGGERED

Contextual Info: CXB1509Q-Y SONY. Quad D Flip-Flop w ith M a ster Reset and D ifferen tial I/O Description Pin A ssignm ent Th e C X B 1 5 0 9 Q - Y is a n ultra h ig h spe e d m onolithic E C L IC, w hich c o n ta in s fo u r D Flip-Flop’s. NC 01 01 01 01 02 02 NC P o s itiv e e dge o f M a st e r C lo c k C * a n d C b trig g e rs

Contextual Info: C 2M O S S IL IC O N TC5018P TC5018P D IG ITA L IN T E G R A T E D C IR C U IT M O N O L IT H IC 4 BIT BINARY COUNTER WITH CLOCK GENERATOR TC5018P is four digit binary counter equipped with CR oscillator circuit to automatically generate the clock pulse and RS flip-flop to provide the clock

TA7609P

Abstract: TA7609 BV12
Contextual Info: TOSHIBA TA7609P D E F L E C T I O N C O M B I N A T I O N FOR C O L O R AND M O N O C H R O M E T E L E V I S I O N RECEIV E RS . unit: run o FUNCTION HORIZONTAL SECTION . . . . . . . Synce Separator Saw Tooth Wave Type AFC 2fn Horizontal Oscillator Flip-Flop

Contextual Info: Am8224 C lo c k G e n e ra to r a n d D riv e r fo r 8080A C o m p a tib le M ic ro p ro c e s s o rs Distinctive Characteristics • Single chip clo ck generator/driver fo r 8 0 8 0 A com ­ patible CPU • Power-up reset fo r C PU • Ready synchronizing flip-flop

DM54

Abstract: DM5496 DM74 DM7496 65352
Contextual Info: DM5496/DM7496 S3 National Semiconductor DM5496/DM7496 5-Bit Shift Registers General Description Features T h e s e shift re g is te rs consist of five R -S m a s te r-s la v e flip* flops con n ected to perform p a ra lle l-to -s e ria l or serial-to p a ra lle l conversion of binary d ata. S ince both inputs and

Contextual Info: S * 42E G S-THOMSON f l D 7=12^237 0 0 3 3 3 2 0 S G S -T H O E V IS O N 3 B S G tH T74LS91 iy 8-BIT SHIFT REGISTER D E S C R IP T IO N The T74LS91 is an 8 Bit Serial-in/Serial-Out Shift Register. This device is composed of eight RS master slave flip-flops, input gating and a clock

DM160

Abstract: DM160 tube max10065
Contextual Info: DM160 6977 S.Q. IN D IC A T O R TUBE H igh-input im p ed an ce, sp e c ia l-q u a lity in d ic a to r tube fo r in d icatio n of the output le v ­ e l of flip flops in co m p u te r c ir c u its e tc . QUICK REFERENCE DATA Life te s t 10 000 h o u rs M echanical quality

7491N shift register

Abstract: 7491N 7491AN FJJ101 FJJ131 FJJ151 FJJ151A
Contextual Info: T.T.L. 8-BIT SHIFT REGISTER FI 115 1 FJJI5IA Corresponds to 74 Series type 7491AN P R O V IS IO N A L D A T A These devices a re tra n sisto r - tra n sisto r logic se ria l in - se ria l out 8 -b it shift re g iste rs, consisting of eight R - S m a s te r-s la v e flip-flops, in the F J se rie s of