RPCF Search Results

ma3208

Contextual Info: MEMORY Unbuffered 1 M x 64 BIT HY AHPM O H F DRAM n I rPcFnR PrMVjc iviKjun. k^fimiviuHIi MB8501E064AD-60/-70 Unbuffered, 1 M x 64 Bit Hyper Page Mode DIMM, 3.3 V, 1-bank, 4 KR • DESCRIPTION The Fujitsu MB8501E064AD is a fully decoded, CMOS Dynamic Random Access Memory DRAM module

Contextual Info: MEMORY Unbuffered 1 M x 64 BIT HY AHPM O H F DRAM n I rPcFnR PrMVjc iviKjun. k^fimiviuHIi Unbuffered, 1 M x 64 Bit Hyper Page Mode DIMM, 3.3 V, 1-bank, 1 KR DESCRIPTION The Fujitsu MB8501E064AC is a fully decoded, CMOS Dynamic Random Access Memory DRAM module

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

telemetry block diagram

Abstract: RPCF NE5044N "RC Encoder" IC NE5044N linear ramp technique ENCODER RC 16 to 4 encoder dip NE5044 NE5044D
Contextual Info: Philips Semiconductors Linear Products Product specification Programmable seven-channel RC encoder DESCRIPTION NE5044 PIN CONFIGURATION The NE5044 is a programmable parallel Input, serial output pulse width encoder. A multiplexed dual linear ramp technique Is used to

Contextual Info: B U R R -B R O W N « [ OPA686 ] Wideband, Low Noise, Voltage Feedback OPERATIONAL AMPLIFIER FEATURES APPLICATIONS • HIGH BANDWIDTH: 250MHz G = +10 • HIGH DYNAMIC RANGE ADC PREAMP • LOW INPUT VOLTAGE NOISE: 1.3nV/VHz • VERY LOW DISTORTION: -90dB c (5MHz)

Contextual Info: CS5336 CS5338 CS5339 Semiconductor Corporation 16-Bit, Stereo A/D Converters for Digital Audio Features General Description Complete CMOS Stereo A/D System Delta-Sigma A/D Converters Digital Anti-Alias Filtering S/H Circuitry and Voltage Reference Adjustable System Sampling Rates

Contextual Info: B U R R - BROW N« E OPA643 1 Wideband Low Distortion, High Gain OPERATIONAL AMPLIFIER FEATURES APPLICATIONS • LOW DISTORTION: -90dBc at 5MHz • LOW NOISE: 2.3nV/VHz • B A SE STATION A DC PREAM P • ADC/DAC BUFFER AM PLIFIER • GAIN-BANDW IDTH PRODUCT: 800MHz

4A14H

Abstract: SRN8
Contextual Info: User Manual V850E2/ML4 32 User’s Manual: Hardware 32-bit Single-Chip Microcontroller V850E2/Mx4 microcontrollers PD70F4021 μ PD70F4022 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

80C51

Abstract: IEC1883 PDI1394L11 PDI394L11 PDII1394L11 PQFP80 ASY 48 VI
Contextual Info: Philips Sem iconductors Prelim inary specification 1394 AV Link Layer Controller 1.0 • • PDI1394L11 FEATURES featuring an embedded AV layer interface. The AV layer is designed to pack and u n -p a c k application data packets for transm ission over an IEEE 1394 bus using isochronous data transfers.

CSR BC5

Abstract: TX01 TMS320C64x DSP Megamodule Reference Guide
Contextual Info: TMS320C6472 SPRS612G – JUNE 2009 – REVISED JULY 2011 www.ti.com TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

IPIF asynchronous

Abstract: DSP48 mnab DS435
Contextual Info: OPB Ethernet Media Access Controller EMAC (v1.04a) DS435 November 9, 2005 Product Specification Introduction LogiCORE Facts This document provides the design specification for the 10/100 Mbs Ethernet Media Access Controller (EMAC). The EMAC incorporates the applicable features described in

PD70F35

Abstract: R01US0001EJ v850E2M architecture Users Manual SUS 303 EZ CG 555 timer guard ring TT 2188 v850e2m NAS11 TAPA2 B32R
Contextual Info: User Manual V850E2/MN4 32 RENESAS MCU V850E2/Mx4 microcontrollers PD70F3510 μPD70F3512 μPD70F3514 μPD70F3515 All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

MSB77-7

Abstract: MSB77 kje t9 kje x3 PJO 186 NJU3504 7D75 lfh 1001 3504F QFP-44
Contextual Info: • • • • • • 8 tf-y S!5> H >J h A/D sa-Mi * « * ï f ï lS f n f al> T Vf tïj>21 o o ü a s ft^ 5 : « ABS • SW&fcgH 4 { » » , ÿ - fv l X N v 2 , v 'JT JU A iÜ * • C-MOS W fi • W& QFP —44/SD I P —4 2 • • • • t s i * i

L66 eeprom

Contextual Info: D ecem b e r 1 9 9 8 PRELIM MARY ^Ék Micro Linear ML6696 100BASE-X Fiber Physical Layer G E N E R A L D E S C R IP T IO N FEATURES T he M L6 6 9 6 in p]em e n ts th e com p le te p h y s ic a l la y e r o f th e F astE them etlO O B A S E -X sta n d a iri ib r f ib e r m e d ia .T h e

Contextual Info: J iiy 1 9 9 7 ^Ék Micro Linear ML6697 100BASE-TX Physical Layer with Mil GENERAL DESCRIPTION FEATURES T he M L 6697 im piem e n ts the com pJete p h y s ic a l J a y e r o f the F a s t E th e rn e t 100 BA SE-TX s ta n d a r d . T he M L6 6 9 7 o ffers a sin g ie-ch ip p e r p o r t so lu tio n iorM IE b ased

SPRM316

Abstract: C6000 DDR2-533 TCI6486 TMS320C6000 TMS320TCI6486 CSR BC5 TMS320TCI6486ZTZ 070CH
Contextual Info: TMS320TCI6486 www.ti.com SPRS300I – FEBRUARY 2006 – REVISED OCTOBER 2009 TMS320TCI6486 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6486 1 Features 1 • Six On-Chip TMS320C64x+ Megamodules • Endianess: Little Endian, Big Endian

Contextual Info: CS51221 10 CS51221 - Enhanced Voltage Mode PWM Controller Features D e sc r ip tio n The CS51221 fix ed freq u en cy fe e d forw ard v o lta g e m o d e PW M controller con tain s all of the featu res n ecessa ry for basic v o lta g e m o d e operation . This

MDIO controller

Abstract: C6000 DDR2-533 TMS320C6000 TMS320C64x DSP Megamodule Reference Guide BED02
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

Contextual Info: TMS320C6472 www.ti.com SPRS612D – JUNE 2009 – REVISED JULY 2010 TMS320C6472 Fixed-Point Digital Signal Processor 1 Features • • • • • • • • • • • Congestion Control • IEEE 1149.6 Compliant I/Os – UTOPIA • UTOPIA Level 2 Slave ATM Controller

Contextual Info: D ecem b e r 1998 PRELÜM MARY ^Ék Micro Linear ML6696 100BASE-X Fiber Physical Layer G E N E R A L D E S C R IP T IO N FEATURES The M L6696 in p]em e n ts th e com p le te p h y s ic a l la y e r o f th e FastEthemetlOOBASE-X standard ib rfib e rm e d ia .T h e

log tx 1044

Abstract: TR74 71011
Contextual Info: TMS320C6472 www.ti.com SPRS612B – JUNE 2009 – REVISED OCTOBER 2009 TMS320C6472 Fixed-Point Digital Signal Processor Check for Samples :TMS320C6472 1 Features 1 • • • • • • • • • • • • Message Passing, DirectIO Support, Error Management Extensions, and

TDA 0200 SP

Abstract: IC TDA 0200 sp 9161-002-051-NA MT8870BE EST17 3.5795 a/TDA 0200 SP
Contextual Info: M ITEL SEM ICONDUCTOR MITEL" 9161-002-051-NA ISSUE 2 December 1987 Features e e ® P in C o n n e c tio n s Com plete D T M F Receiver Low Pow er Consum ption Internal Gain Setting Am plifier Adjustable Guard Time Central Office Quality IN + C 1 U l 8

Contextual Info: S G S -T H O M S O N L292 SW ITC H -M O D E DRIVER FOR DC MOTORS • ■ ■ ■ ■ ■ The L290/1/2 system can be directly controlled by a microprocessor. DRIVING CAPABILITY : 2 A, 36 V, 30 KHz 2 LOGIC CHIP ENABLE EXTERNAL LOOP GAIN ADJUSTEMENT SINGLE POWER SUPPLY 18 TO 36 V