REG45 Search Results

ITT 90 38 TCA 700 Y

Abstract: ITT G 91 38 TCA 700 y ITT TCA 700 Y REG-52H Delta Electronics dps -300HB A Delta Electronics dps -350MB A reg51 Delta Electronics dps Delta Electronics DPS 350MB-3a Delta Electronics dps 500
Contextual Info: PRESS CY7C955 PRELIMINARY AX ATM-SONET/SDH Transceiver Features — Line Far End Receive Failure — Line Alarm Indication Signal * WAN and LAN ATM physical layer device * Provides com plete physical layer transport of ATM cells at: — B1 Parity Error

MA17

Abstract: MA18 MX98728EC Macronix marking GMAC
Contextual Info: MX98728EC 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs

MT9V403C12STC

Abstract: Photodetector Sensor c705
Contextual Info: MT9V403 - 1/2-Inch VGA Digital Image Sensor Features 1/2-Inch VGA with Freeze-Frame CMOS Image Sensor MT9V403 For the latest data sheet revision, please refer to Micron’s Web site: www.micron.com/imaging Features Table 1: • Output: 10-bit digital through a single port

h145

Contextual Info: AX ATM-SONET/SDH Transceiver — Line Far End Receive Failure Featu res * WAN and LAN ATM physical layer device * P rovides co m p le te physical layer tr a n s p o rt o f ATM cells at — S T S -3 c / STM-1 rate of 155.52 MHz — Line Alarm Indication Signal

Contextual Info: / T 7 SGS-IHOMSON *J M , H D Ê œ ttJ lC T M D Ê g S T V 0 1 1 7 PAL/NTSC DIGITAL ENCO DER ADVANCE DATA • NTSC-M, PAL-M, PAL-B, D, G, H, I, PAL-N EASILY PROGRAMMABLE VIDEO OUTPUTS ■ UN AND Q/l MATRIXING FOR RESPEC­ TIVELY PAL AND NTSC ENCODING ■ DIGITAL FRAME SYNC INPUT/OUTPUT

63D12

Contextual Info: Advanced Information NPC401QFA-100 SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION 1.0 Features • 32 bits general purpose asynchronous bus architecture up to 33Mhz for easy system application • Single chip solution integrating 10/100 TP transceiver to reduce overall cost

E108998

Abstract: Belden, E108998, 16 AWG CABLE E138034 CABLE E108998 MX98728EC E108998, 16 AWG CABLE 4PR24 1583a 4pr24 e108998 marking code C66 Belden, E108998 st6118
Contextual Info: PRELIMINARY MX98728EC APPLICATION NOTE 1. INTRODUCTION The purpose of this application note is to describe the Implementation of a generic bus 100Base-TX Fast Ethernet node using MXIC highly integrated single chip Fast Ethernet controller MX98728EC series. Most description in this application note applied to both

h1632

Abstract: Macronix marking ds130 diode MAR7 MA17 MA18 MX98728EC Long teim timer 4D70 LTPS
Contextual Info: MX98728EC 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs

ITT TCA 700 Y

Abstract: reg52 reg51 ITT 90 38 TCA 700 Y gfcf3 ITT G 91 15 TCA 700 y ITT J TCA 700 Y
Contextual Info: »’ X lOOOOOUUkvs. Annu Æ m ttM à. . r -p ï va ^¿ï&A'ÿ* v«W CY7C955 A X ATM-SONET/SDH Transceiver — Line Far End Receive Failure Features — Line Alarm Indication Signal • WAN and LAN ATM physical layer device • Provides complete physical layertransportof ATM cells

MCS-51 Macro Assembler guide

Abstract: 80C530 MCS-51 Macro Assembler Users Guide 80C520 SIECO-51 80c751 C51-COMPILER REG51G P8288 siemens 80c517
Contextual Info: C51 Compiler Optimizing 8051 C Compiler and Library Reference User’s Guide 01.97 ii Information in this document is subject to change without notice and does not represent a commitment on the part of the manufacturer. The software described in this document is furnished under license agreement or nondisclosure

Contextual Info: ACT8810 Rev 9, 15-Nov-12 Eight Channel ActivePathTM Power Management IC FEATURES GENERAL DESCRIPTION • ActivePathTM Li+ Charger with System Power The patent-pending ACT8810 is a complete, cost effective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of

Contextual Info: CYPRESS PRELIMINARY AX ATM-SONET/SDH Transceiver Features • Com plete line interface — Clock and data recovery • WAN and LAN ATM physical layer device • Provides com plete physical layertransportof ATM cells at — Transmit timing derived from receiver or byte-rate

MT9V403

Abstract: MT9V403C12ST freeze-frame cmos Micron CMOS sensor VGA CMOS global shutter
Contextual Info: 1/2-INCH VGA WITH FREEZE-FRAME CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR 1/2-INCH CMOS ACTIVEPIXEL CMOS IMAGE SENSOR MT9V403 Features Description Micron Part Number: MT9V403C12ST The Micron Imaging MT9V403 VGA-based CMOS active-pixel sensor has a 1/2-inch optical format and

MT9V403C12ST

Abstract: freeze-frame cmos Micron CMOS sensor VGA BRIGHT MICRON TECHNOLOGY airbag micron cmos sensor connection
Contextual Info: Preliminary‡ 1/2-INCH VGA WITH FREEZE-FRAME CMOS ACTIVE-PIXEL DIGITAL IMAGE SENSOR 1/2-IN CMOS ACTIVE-PIXEL CMOS IMAGE SENSOR MT9V403 Features Description Micron Part Number: MT9V403C12ST The Micron Imaging MT9V403 VGA-based CMOS active-pixel sensor delivers superb resolution at a turbocharged 200 fps, making it the perfect solution for

LTE tranceiver

Contextual Info: MX98726EC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0 Features • Support bus size configuration: - CPU : 8 bits, SRAM: 8 bits - CPU : 16 bits, SRAM: 8/16 bits • Flexible packet buffer partition and addressing space for 32k, 64k up to 512K bytes

MA8121

Abstract: AD10 AD11 MD10 MD11 MX98726
Contextual Info: ADVANCED INFORMATION MX98726 SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0 Features • Support bus size configuration: - CPU : 8 bits, SRAM: 8 bits - CPU : 16 bits, SRAM: 8/16 bits • Flexible packet buffer partition and addressing space

Contextual Info: MX98726EC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0 Features • Support bus size configuration: - CPU : 8 bits, SRAM: 8 bits - CPU : 16 bits, SRAM: 8/16 bits • Flexible packet buffer partition and addressing space for 32k, 64k up to 512K bytes

Contextual Info: CY7C955 CYPRESS ^ = ^ = AX ATM-SONET/SDH Transceiver Features — Line Far End Receive Failure • WAN and LAN ATM physical layer device • Provides com plete physical layer transport of ATM cells at — S T S -3 c/ STM -1 rate of 155.52 MHz — Line Alarm Indication Signal

Contextual Info: ADVANCED INFORMATION MX98728 1.0 Features GMAC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER FOR GENERIC APPLICATION • 1.6KB TX FIFO to support maximum network throughput in the full duplex mode • 16/8 bits SRAM interface of the packet buffer supporting burst DMA for on-chip FIFOs

Contextual Info: PRELIMINARY MX98224EC 24-port Dual-Speed Ethernet Switch Controller FEATURES l l l l l l l l l Single chip 24-port 10/100M wire speed Ethernet switching controller with all memory embedded Integration of 24-port dual speed, full/half duplex capable Media Access Controllers MACs with RMII

ACT8798

Contextual Info: ACT8798 Rev0, 10-Oct-08 Six Channel Integrated Power Management IC for Handheld Portable Equipment FEATURES GENERAL DESCRIPTION • Multiple Patents Pending • Six Integrated Regulators The patent-pending ACT8798 is a complete, costeffective, highly-efficient ActivePMUTM power management solution that is ideal for a wide range of

Delta Electronics dps -300HB A

Abstract: Delta Electronics dps 500 TCA 700 y Delta Electronics dps -350MB A Delta Electronics dps Delta Electronics dps -160 Delta Electronics DPS 350MB Delta Electronics DPS 350MB-3a CY7C955 GR-253
Contextual Info: V CYPRESS PRELIMINARY_ CY7C955 AX ATM-SONET/SDH Transceiver — Line Far End Receive Failure Features — Line Alarm Indication Signal • WAN and LAN ATM physical layer device • Provides com plete physical layer transport of ATM cel Is

MAR7

Abstract: MD11 MD14 MX98726
Contextual Info: ADVANCED INFORMATION MX98726 SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0 Features • Support bus size configuration: - CPU : 8 bits, SRAM: 8 bits - CPU : 16 bits, SRAM: 8/16 bits • Flexible packet buffer partition and addressing space

MD14

Abstract: MX98726EC ds130 diode diode 0A70
Contextual Info: MX98726EC SINGLE CHIP 10/100 FAST ETHERNET CONTROLLER WITH uP INTERFACE 1.0 Features • Support bus size configuration: - CPU : 8 bits, SRAM: 8 bits - CPU : 16 bits, SRAM: 8/16 bits • Flexible packet buffer partition and addressing space for 32k, 64k up to 512K bytes