RAPS Search Results

RAPS

Abstract: BS1004A push to make switch red push to make switch o general AC BS10-04A BS1004 Polyamid
Contextual Info: RAPS-PUSH BUTTON SWITCH GENERAL ELECTRICAL & MECHANICAL SPECIFICATION Rating: Maintained Rating: Momentary 2 Life: Operating Temperature: Proof voltage: Insulation Resistance: Contact Maintained Contact Momentary (2) Switch Housing: Switch Wafer: Switch Plunger:

HLMP-2500

Abstract: HLMP2450 OPTION S02 HDSP-4830
Contextual Info: W K3Ì HEWLETT mLMM PACKARD LED Light Bars Standard Options LIGHT RAPS A N D BAG G ^ A d H ADRA'-' Technical Data O ption S02, S22 D escription Due to applications that require tightly matched devices, HewlettPackard has developed several standard options to service these

EW127

Abstract: EWP127A-117W EWP127A EW127A 1127DCT 1127DCM 6150H 1127DEM 35849A PBR120
Contextual Info: M ic ro w a v e T ra n s m is s io n L ines 3Ss raps«;, ‘L i * Characteristics Type Numbers Premium Waveguide, Standard Jacket Standard Waveguide, Standard Jacket Premium Waveguide Type CATVP Standard Waveguide, Fire Retardant, Non-Halogenated Jacket 35409-15*

TC528257

Abstract: n724
Contextual Info: TOSHIBA SILICON GATE CMOS TC528257 t a r g e t s p e c 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION The TC528257 is a 2M bit CM OS multiport m em ory equipped with a 262,144-w ords by 8 -bits dynam ic random access m em ory RAM port and a 512-words by 8 -bits static serial access m emory (SA M ) port. The

Contextual Info: SMJ44C250 262 144 BY 4-BIT MULTIPORT VIDEO RAM SGMS037 — JANUARY 1991 * Military Operating Temperature Range JD Package* Top View . . , - 5 5 ° C t o 125°C DRAM: 262 144 Words SAM: 512 Words * * * x x 4 Bits 4 Bits 28 : 27 : 3 26 : SDQ2 TRG c 4 25 :

SF229

Abstract: toshiba s105
Contextual Info: TOSHIBA TC528257 t a r g e t s il ic o n g a t e c m o s s p e c 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION T h e T C 5 2 8 2 5 7 is a 2M b it C M O S m u ltip o rt m e m o ry eq u ip p e d w ith a 2 6 2 ,1 4 4 -w o rd s b y ra n d o m a ccess m e m o ry R A M p o rt a n d a 5 1 2 -w o rd s by

TXC07900AIBG

Abstract: TXC-07900AIBG TSOP transmitter B020H OED155TM TXC-07900-MB VTXP-6 AU-AIS dk12b EK117
Contextual Info: OED155 Device Dual STM-1 Overhead Terminator, Tributary Processor and Cross-Connect with Integrated E1 Mapper TXC-07900 PRODUCT PREVIEW DATA SHEET DESCRIPTION: ™ The Optimized Edge Device, OED155, is a dual STM-1 SDH framer and overhead terminator, virtual tributary

TranSwitch Corporation

Abstract: B2M1-5
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

TH4B

Contextual Info: PHAST-3N STM-1/STS-3/STS-3c SDH/SONET Overhead Terminator with Telecom Bus Interface TXC-06103 DATA SHEET • • • • • • • • • • • • • • • • • Bit-serial SDH/SONET line interface - Pseudo-ECL interface with clock recovery and synthesis

SRAM timing

Contextual Info: SAMSUNG E L E C TRONICS INC b7E J> • 7TbmN2 0Ü177M2 KM79C86 ISfi M S I I S K CMOS SRAM 3 2 K x9 Synchronous Burst Cache RAM with Self-Timed Write FEATURES GENERAL DESCRIPTION • Synchronous Operation The KM79C86 is a 294,912 bit S ynchronou s S tatic Ran­

MSM5416263

Abstract: 256x16* STATIC RAM weland SM5416
Contextual Info: OKI Semiconductor MSM5416263 262,144-W ord x 1 6 -Bit M ultiport D RA M DESCRIPTION The MSM5416263 is a 4-Mbit CMOS multiport DRAM composed of a 262,144-word by 16-bit dynamic RAM and a 512-word by 16-bit SAM. Its RAM and SAM operate independently and asynchronously.

Contextual Info: H ig h P e rin i 111,1n<c 64K X i A S 7 ' i(S4 M A I CM OS SR\M 64Kx Î2 .Synchronous hursi SH/1M Preliminary information Features • O rg a n iz a tio n : 6 5 ,5 3 6 w o rd s x 32 bits • A sy n c h ro n o u s o u tp u t enable co n tro l • F u lly s y n c h ro n o u s p ip e lin e d o p e ratio n

Contextual Info: D-DF D-Sub connectors - Screw-machined Contacts Specifications Amphenol's 17D and 17DF series • UL File: E64911 fixed contact D-Subminiature • Connectors according to: M IL C 243 08 • NFC93425-HE5 connector is suitable for industrial or telecom use.

251S4

Contextual Info: SBE C O N N E C T O R S IN S T R U C T IO N S Assembly instructions for S B E * 160 and S B E * 3 2 0 so m » two po*e battery c i onnector with option for two auxiliary contact* S B E * A U X IL IA R Y C O N T A C T S A s s e m b lin g In s tru c tio n s

Contextual Info: <991 in te i 80C188XL20,16,12, 10 16-BIT HIGH INTEGRATION EMBEDDED PROCESSOR • Low Power, Full Static Version of the 80C188 Direct Addressing Capability to 1 Mbyte Memory and 64 Kbyte I/O ■ Operation Modes Include: — Enhanced Mode — DRAM Refresh Control Unit

m514262

Abstract: MSM514262 MSM514262-10 MSM514262-70 MSM514262-80 ZIP28-P-400 M5M51426 MSM51426
Contextual Info: O K I Semiconductor MSM5 14262 262,144-Word x 4-Bit Multiport DRAM DESCRIPTION The MSM514262 is a 1-Mbit CMOS m ultiport DRAM com posed of a 262,144-word by 4-bits dynam ic RAM and a 512-words b y 4-bits SAM. Its RAM and SAM operate independently and asynchronously.

lcsb

Abstract: PM5312 PM5344 PM5345
Contextual Info: PM5312 STTX Summary Information SONET/SDH TRANSPORT OVERHEAD TERMINATING TRANSCEIVER FEATURES • Monolithic SONET/SDH Transport Overhead Terminating Transceiver for use in STS-1, STS-3 STM-1 or STS12 (STM-4) applications. • Operates in STS-1 bit serial mode,

Contextual Info: H ig h P e r f o r m a n c e 64K X 32 C M O S SRA M n II A S7C 36432 6 4 K X 3 2 Synchronous burst SRAM Preliminary information • O r g a n iz a tio n : 6 5 , 5 3 6 w o r d s x 3 2 b its • A s y n c h r o n o u s o u t p u t e n a b le c o n tr o l • F u lly s y n c h r o n o u s p ip e lin e d o p e r a tio n

TXC-06101AILQ

Abstract: TAIS SOT GR-253-CORE TXC-06101 GR-1400-CORE 1C11C
Contextual Info: PHAST-1 Device SONET STS-1 Overhead Terminator TXC-06101 DATA SHEET • Provides SONET interface to any type of payload • Programmable STS-1 or STS-N modes • Receive bit-serial STS-1 signal input to the Line Side using external reference frame pulse for

ha 117324

Contextual Info: PRELIMINARY Semiconductor December 1992 NS32 AM 162-20/NS32 AM 163-20 Voice Processor with Serial CODEC Interface General Description The NS32AM162 and the NS32AM163 are integrated 32 bit members of the Series 32000 /EP family of National’s Em­ bedded System Processors , tuned for the Digital tape­

Contextual Info: IIIIICRTRLY5T • III / Prelim inary S E M I C O N D U C T O R CAT24C02/CAT24C02I 2K-Bit SERIAL E2PROM FEATURES ■ PC Bus C o m p atib le* S e lf Tim ed Prog ram m in g C ycle w ith A u toerase ■ Low Pow er C M O S Tech no log y 100,000 E rase/W rite Cycles

Contextual Info: DALLAS SEMICONDUCTOR DS1306 Serial Alarm Real Tim e C lock RTC FEATURES PIN ASSIGNMENT • Real tim e clock counts seconds, minutes, hours, date of the month, month, day of the week, and year with leap year com pensation valid up to 2100 -X Z T 3d Vqqi Veat “ =

Contextual Info: C h a pt er E10 Floating-Point Unit E10.1 Overview of the MB86936 Floating-Point Unit The MB86936 FPU fully conforms to the A N SI/IEEE Standard 754-1985, the SPARC Architecture Version 8 specification, and he SPARC IEEE754 Implementation Recommendation except for the Nonstandard FP (NS=1 mode implementation.

Contextual Info: TOSHIBA TC528257 t a r g e t s il ic o n g a t e c m o s 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION T h e T C 5 2 8 2 5 7 is a 2 M b it C M O S m u ltip o rt m e m o ry e q u ip p e d w ith a 2 6 2 ,1 4 4 -w o rd s b y ra n d o m access m e m o ry R A M p o rt an d a 5 1 2 -w o rd s b y