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QL20091PB Datasheets (2)

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QuickLogic

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
QL2009-1PB256C		QuickLogic	3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility	Original	PDF	277.15KB	12
QL2009-1PB256I		QuickLogic	3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility	Original	PDF	277.15KB	12

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QuickLogic Corporation


QuickLogic Corporation QL2009-1PB256 FIELD PROGRAMMABLE GATE ARRAY, 672 CLBS, 9000 GATES, 161MHZ, 672-CELL, CMOS, PBGA256
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	QL2009-1PB256		7			1 $123.50 10 $118.75 100 $118.75 1000 $118.75 10000 $118.75	Buy Now

QL20091PB Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	ql2009	PDF
PF144 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	ql2009 pf144 pq208 ql2009-1pb256c +2ql2009-1pf144c ql2009-1pq208c	PDF
QL2009 Abstract: QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C TIL405 Contextual Info: Q L2009 9,000 Gate pASIC 2 FPGA Com bining Speed, Density, Low Cost and Flexibility PRELIMINARY DA TA pASIC 2 HIGHLIGHTS E Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	OCR Scan	ql2009 pq208 pf144 144-pin +8208-pin pb256 256-pin 0000b77 ql2009-1pb256c ql2009-1pf144c ql2009-1pq208c til405	PDF
cadence xa 125 2 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C IOG20 Contextual Info: QL2009 9,000 Gate 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIM INARY DATA pASIC 2 HIGHLIGHTS Rev. B 5 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	OCR Scan	ql2009 cadence xa 125 2 pq208 ql2009-1pb256c +3ql2009-1pf144c ql2009-1pq208c iog20	PDF
PCI i/o schematics Abstract: PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. D pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	ql2009 pci i/o schematics pf144 pq208 +3ql2009-1pb256c ql2009-1pf144c ql2009-1pq208c	PDF
77-I Abstract: PB256 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Contextual Info: Appendix J - QL2009 Pinout Diagrams Appendix J: QL2009 Pinout Diagrams QL2009 Packages Summary Total # Pins Package Type No Connect VCC and GND JTAG/ Prog Clock 144 208 256 TQFP PQFP PBGA 20 28 25 6 6 6 4 4 4 User Pins Input-Only Input/Output 4 4 4 110 166	Original	ql2009 pf144 ql2009-1pf144c 77-i +4pb256 pq208 ql2009-1pb256c ql2009-1pq208c	PDF
PF144 Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C Contextual Info: QL2009 9,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIMINARY DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	ql2009 pf144 pq208 ql2009-1pb256c +2ql2009-1pf144c ql2009-1pq208c	PDF
456-PBGA Abstract: QL20091PB Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance	Original	ql2009 -16-bit 144-tqfp ql24x32b +6208-pqfp 208-cqfp 125oc mil-std-883 456-pbga ql20091pb	PDF
QL2009-1PB256C Abstract: PB256 PF144 PQ208 QL2009 QL2009-1PF144C QL2009-1PQ208C Contextual Info: Appendix I - QL2009 Pinout Diagrams Appendix I: QL2009 Pinout Diagrams QL2009 Packages Summary Total # Pins Package Type No Connect VCC and GND JTAG/ Prog Clock 144 208 256 TQFP PQFP PBGA 20 28 25 6 6 6 4 4 4 User Pins Input-Only Input/Output 4 4 4 110 166	Original	ql2009 pf144 ql2009-1pf144c ql2009-1pb256c +3pb256 pq208 ql2009-1pq208c	PDF