Q033 Search Results

p65C51

Contextual Info: HARRIS SEMÏCOND SECTOR [£ } MGE D m 4302271 Q0332fi3 T E2JHAS H L A J R R IS c CD January 1991 CMOS Asynchronous Communications -0 5 Interface A dapter ACIA Features • • • • • • • • • • • • • • • P in o u t C o m patible W ith 8 -B lt M icroprocessors

Contextual Info: 7 T S ci 2 3 7 un 1S 6 TH Q033b24 SGS-'mOMSOM ~ r-V é -o 7 V o T74LS378 IM [H ì [I[L i S ¥ [H ì® iO © i HEX PARALLEL D REGISTER WITH ENABLE • 8-BIT HIGH SPEED PARALLEL REGISTER ■ POSITIVE EDGE-TRIGGERED D-TYPE FLIPFLOPS ■ FULLY BUFFERED COMMON CLOCK AND

JAN 1N4150-1

Abstract: JANS1N4150-1 JANS1N6640 1N3600 1N4150-1 1N4150UR-1 3pda Q033b D0213 Scans-0016000
Contextual Info: MIL SPECS H4 E D 00G0125 Q033bfl7 [The documentationand process conversion | Imeasures necessary to comply with this | |revision shaLl be completed by 23 MAR 94. |

1336-002

Abstract: c 1117 MU201
Contextual Info: B n N E n ^y Y -y —5 H * . &3EIÈ. * tt T 1 13-0034 m « ll5 Ä Ä K Ä 1 -3 -1 003-3813-5121 FAX 03-3813-6521 T 367-0021 lÖ E * *J ± m S Ö 2 -3 -1 M 03495-22-0851 ' í a ' í a í S t 'J U FAX 0495-24-6603 \. T 331 -0812 i S ï * é! ' * S m ^Kg/IB J3-429-1

AXP 188 ba

Abstract: 21071-DA 2mb1100 AXP 188 IC 5188b RSAD 5111 1M 21071-BA 82378IB 21071AA d327c
Contextual Info: m DECchip 21071-AA, 21072-AA Core Logic Data Sheet m A p ril 1994 21071-AA, 21072-A A Features: • Supports the entire fam ily of the DECchip 21064 Alpha AXP m icroprocessors • DECchip 21071-AA: 128-bit cache/64-bit memory • DECchip 21072-AA: 128-bit cache/128-bit

SAB 82258

Abstract: sab82257
Contextual Info: 4 7E D Device Specifications • fiSBSbGS SIEI1ENS DD330S1 1 « S IE G AKTI ENGESELLSCHAF Preliminary T - « 3 - 3 3 - l et SAB 82257 High-Performance DMA Controller for 16-Bit Microcomputer Systems SAB 82257 SAB 82257-6 8 MHz 6 MHz • • • • 16 Mbytes addressing range

Contextual Info: a >i MITSUBISHI MICROCOMPUTERS M37736EHLXXXHP PROM VERSION OF M37736MHLXXXHP DESCRIPTION •Instruction execution time The M37736EHLXXXHP is a single-chip microcomputer using the The fastest instruction at 12 MHz frequency. 333 ns 7700 Family core. This single-chip microcomputer has a CPU and a

Contextual Info: BU RR - BROW N ADS7822 12-Bit High Speed 2.7V Micro Power Sampling ANALOG-TO-DIGITAL CONVERTER FEATURES DESCRIPTION • 75kHz SAMPLING RATE The ADS7822 is a 12-bit sampling analog-to-digital converter with guaranteed specifications over a 2.7V to 3.6V supply range. It requires veiy little power even

Contextual Info: BU RR - BROW N ADS7809 16-Bit 10|is Serial CMOS Sampling ANALOG-to-DIGITAL CONVERTER FEATURES DESCRIPTION • 100kHz SAMPLING RATE The ADS7809 is a complete 16-bit sampling analogto-digital using state-of-the-art CMOS structures. It contains a 16-bit capacitor-based SAR A/D with S/H,

Contextual Info: 17313b5 0Q330SQ 7ST Precision, Low Power INSTRUMENTATION AMPLIFIERS FEATURES DESCRIPTION • LOW OFFSET VOLTAGE: 50jiV max The INA128 and INA129 are low power, general purpose instrumentation amplifiers offering excellent accuracy. Their versatile 3-op amp design and small

OPA2658

Contextual Info: Dual Wideband, Low Power, Current Feedback OPERATIONAL AMPLIFIER FEATURES APPLICATIONS • UNITY GAIN STABLE BANDWIDTH: 800MHz • LOW POWER: 50mW/Chan. • LOW DIFFERENTIAL GAIN/PHASE ERRORS: 0.01%/0.03° • HIGH SLEW RATE: 1700V/ps • PACKAGE: 8-Pin DIP, SO-8 and MSOP-8

Q0465

Abstract: PLC Communication cables pin diagram fanuc 90-30 plc internal cpu wiring diagram fanuc q0265 plc 90-30 CMM311 fanuc ge PLC Communication cables pin diagram Q0260 for plc internal cpu wiring diagram ge fanuc cpu 331
Contextual Info: Du line Dupline Plug & Play Master Module Interface for GE-Fanuc PLC Type G 3496 0002 ® Fieldbus Installationbus • GE-Fanuc master • Plug and play: Automatic communication with specific PLC/Controllers • Built-in normal Dupline® Channel Generator

Contextual Info: DECchip 21171 Core Logic Chipset Technical Reference Manual Order Number: EC-QE18A-TE Revision/Update Information: Digital Equipment Corporation Maynard, Massachusetts aam i3t. 0 0 3 3 7 3 3 0 22 Preliminary—Subject to Change Ju ne 1995 W hile D igital believes th e inform ation in th is publication is correct as of th e d ate of publication,

Contextual Info: a P R E L IM IN A R Y Advanced Micro Devices Am79C830A FORMAC Plus DISTINCTIVE CHARACTERISTICS • Implements the FDDI Media Access Control MAC layer protocol for ISO standard 9314-2 ■ Pointers to claim and beacon frames ■ Buffer-memory clock frequency range:

LIGHT DEPENDENT RESISTOR 10 MM

Contextual Info: C D P 68H C 05C 4, OS, 0 7 CDP6QUCLQ5C4, C8, 0 7 CDP6QHSC05C4, C8, 0 7 HARRIS <£ X 8-Bit Microcontroller Series Decem ber 1991 Description The CDP68HC05C4 HCMOS Microcomputer Is a member of the CDP68HC05 lamlly of low-cost single chip microcomputers. This 8-blt microcomputer unit MCU con­

Contextual Info: S 6 S-THOMSON M2E » 7 SST237 0G33MÖÖ ö ÖSGTH : X-46-09-05 S G S -T H O M S O N T74LS195A l^D ^ s i[L(i©ir^ iDOi UNIVERSAL 4-BIT SHIFT REGISTER a • ■ ■ ■ ■ TYPICAL SHIFT REGISTER FREQUENCY OF 40 MHz ASYNCHRONOUS MASTER RESET J, K INPUT TO FIRST STAGE

D42S4400

Abstract: NEC 424400
Contextual Info: N EC ELECTRONICS INC NEC Electronics Inc. b l E D • b4B7SB5 DQ33b3G T3? M N E C E pPD424400, 424400A/L, 42S4400A/L 1,048,576 X 4-Bit Dynamic CMOS RAM T - H í - X j » -/< ? Description Features The devices listed below are fast-page dynamic RAMs organized as 1,048,576 words by 4 bits and designed to

Contextual Info: HB56U272E Series 2,097,152-word x 72-bit High Density Dynamic RAM Module HITACHI ADE-203-713A Z Rev. 1.0 Jan. 27, 1997 Description The HB56U272E belongs to 8 Byte DIMM (Dual In-line Memory Module) family, and has been developed as an optimized main memory solution for 4 and 8 Byte processor applications. The

Contextual Info: HM5116405I Series 4,194,304-word x 4-bit Dynamic RAM HITACHI ADE-203-757A Z Rev. 1.0 Mar. 17,1997 Description The Hitachi HM51164051 Series is CMOS dynamic RAM organized 4,194,304-word x 4-bit. It employs the most advanced CMOS technology for high performance and low power. The HM51164051 Series

Contextual Info: PRELIMINARY Am29F400AT/Am29F400AB 4 Megabit 524,288 x 8-Bit/262,144 x 16-Bit CMOS 5.0 Volt-only, Sector Erase Flash Memory Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 5.0 V ± 10% for read and write operations — Minimizes system level power requirements

68HCll

Abstract: PE-64931 CR003 BT8510EPJC 68HC11 TS16 0x80-0x9F sr002
Contextual Info: f i| Product Description Features and Modes of Operation This specification describes the Bt8510 El (often called CEPT or DS1A) frame synchronization, signal generation, and recovery circuit for application in digital terminal interfaces operating at 2.048 Mb/s. Applications for this device include

Q-024

Abstract: QO11 Q-050 384 5b Q016 QO-11 q033
Contextual Info: MHTEPTEKC www.i-t.su info@i-t.su Ten: electronics 495 739-09-95, 644-41-29 KBapMeBbie reHepaTopbi b MeTannunecKOM Kopnyce HanpaweHHe :5B Pa6oHaa TeMnepaTypa : o t 0°C a o 70°C TeMnepaTypHaa CTa6nnbHOCTb : ± 100 ppm Harpy3Ka :1 0 T T L L S Kofl: Q 01.00

KM416S4030A

Abstract: km416s4031 KM416S4030AT-G
Contextual Info: K M 4 16 S 4 0 3 1 AT SDRAM ELECTRONICS 1 M x 16Bitx 4 Bank Synchronous DRAM FEATURES GENERAL DESCRIPTION • JEDEC standard 3.3V Power Supply. • LVTTL/SSTL_3 Class II compatible with multiplexed address. • 4 banks operation. • MRS cycle with address key programs.

Contextual Info: MITSUBISHI LSIs Some contents are subject to change without notice. MH1 S64CXJJ-12,-15 67108864-B IT 1048576-W Q RD BY 64-BIT SynchronousDRAM DESCRIPTION The MH1S64CXJJ is 1048576-word by 64-bit Synchronous DRAM module. This consists of four industry standard 1Mx16 Synchronous DRAMs in