PZ28 Search Results

JS28F128M29EWL

Abstract: JS28F128M29EWH JS28F128M JS28F128M29EWHF JS28F128M29EW JR28F032M29EWT PC28F128M29EWL JS28F064M29EWXX PZ28F032M29EWHA M29EW
Contextual Info: 32Mb, 64Mb, 128Mb: 3V Embedded Parallel NOR Flash Features Parallel NOR Flash Embedded Memory JR28F032M29EWXX; PZ28F032M29EWXX; JS28F064M29EWXX PC28F064M29EWXX; JR28F064M29EWXX; PZ28F064M29EWXX JS28F128M29EWXX; PC28F128M29EWXX; RC28F128M29EWXX Features • VPP/WP# pin protection

Contextual Info: QS29FCT520T, 521T, 2520T, 2521T High Speed CMOS • ■ IX-I IMultileveli nPipeline Registers Q q s 29 f c t 52ot QS29FCT521T QS29FCT2520T QS29FCT2521T FEATURES/BENEFITS • • • • Pin and function compatible to the Am29520 Ground bounce controlled outputs

Contextual Info: A D V A N C E D E L E C T R O N I C PKG 3TE D B DSSMVTB 0DQ0371 2 D AEP AEPRZ32 32 UNE SUPPORT MODULE 'V U ftM l* * ’ ’i * • -• • — il; , m • • I . . ■■■■Il . u T- . f il i l i I I I IL I. ■»

H9723

Abstract: h9740 l9718 L9712 L9709 L9727 T9934 l9731 L9706 l9735
Contextual Info: INTEGRATED DEVICE TECHNOLOGY, INC. QUALITY & RELIABILITY MONITORS April 1998 2975 Stender Way, Santa Clara, CA 95054 TEL: 800 345-7015 FAX: (408) 492-8674 QUALITY & RELIABILITY MONITOR REPORT April 1998 TABLE OF CONTENTS Section I: Introduction Section II:

Contextual Info: QSFCT240T, 241T, 244T, 2240T, 2241T, 2244T Q QS54/74FCT240T QS54/74FCT241T QS54/74FCT244T High Speed CMOS 8-Bit Buffers/Line Drivers QS54/74FCT2240T QS54/74FCT2241T QS54/74FCT2244T FEATURES/BENEFITS • Pin and function compatible to the 74F240/1/4 74FCT240/1/4 and 74ABT240/1/4

PZ-280

Abstract: eP13 bobbin transformer bobbin EP13 WF2901 13 SMD smd hk-1 Pulse Transformer VAC 2L smd transistor VAC PULSE TRANSFORMER WF-2901
Contextual Info: Mag Com 2>.Designed to meet Supplementary Insulation .530 13,46 MAX .605 15,37 .100 2,54 XXXX HK 1>.Designed for use with ADI'S AD20MSP910 IC Chip EX-1030 Features 10 X .028 ± .002 0,71 ± 0,05 .695 17,65 MAX Mag.C om ADSL Transformer EX-1030S .098 2,50 .098

Contextual Info: ADVANCED ELECTRONIC PKG B'ìE D E3 05547^3 □QQD37tl 7 E1AEP AEPCZ32 32 LINE SUPPORT MODULE > > Quad 8 line com parator module. > > High density .0 70 center spaced Z IP leads fo r maximum I/O in minim um area. » 7 5 » Z IP pin Space saving vertical mounting orientation.

823T

Abstract: 825T
Contextual Info: QSFCT821T, 823T, 825T, 2821T, 2823T, 2825T Ö High Speed CMOS Bus Interface 8-, 9-, and 10-Bit Registers QS54/74FCT821T QS54/74FCT823T QS54/74F CT825T QS54/74FCT2821T QS54/74FCT2823T QS54/74FCT2825T FEATURES/BENEFITS • Pin and function compatible to the 74F821/3/5

L9939

Abstract: B897 k9920 L9924 k1917 JESD22-B100 K9928 K2837 P9848 h9910
Contextual Info: INTEGRATED DEVICE TECHNOLOGY, INC. QUALITY & RELIABILITY MONITORS October 1999 2975 Stender Way, Santa Clara, CA 95054 TEL: 800 345-7015 FAX: (408) 492-8674 QUALITY & RELIABILITY MONITOR REPORT October 1999 TABLE OF CONTENTS Section I: Introduction Section II:

Contextual Info: ADVANCE» ELECTRO NIC PKG 3RE » E3 02547^3 0 00 03 ^ 4 ESAEP AEPLZ32 32 LINE SUPPORT MODULE > > 52-bit bus interface latches, non-inverting or inverting. > > High density .0 7 0 center spaced Z IP leads for maximum I/O in minimum area. > > Space saving vertical

Contextual Info: ADVANCED ELECTRO NIC PKG 3=IE D Bi 05547=13 0000377 3 E1A EP AEPTRZ32 32 UNE SUPPORT MODULE T ~ 5 J L - £ o - < to > > 3 2 bit bus transceiver/register, non-inverting or Inverting. > > High density .070 center spaced ZIP leads for maximum I/O in minimum area.

Contextual Info: ADVANCED ELEC TR O N IC PKG 3=îE D El 05547*13 0 0 G D 3 b7 D E3AEP AEPB232 32 UNE SUPPORT MODULE T - 5 2 'O ^ > > 3 2 line bus interface > > Individual control of each 8 line group. > > High density .070 center spaced ZIP leads for maximum I/O in minimum area.

Contextual Info: g High-Speed CMOS 8-Bit Bus Interface Q uALrrY S em ico nducto r , I n c . qs 54/74fct 646t qs 54/74fct 2646t Register Transceivers FEATURES/BENEFITS DESCRIPTION • Pin and function compatible to the 74F646 74FCT646 and 74FCT646T • CMOS power levels: <7.5mW static

Contextual Info: QS29FCT52T, 53T, 2052T, 2053T Q QS29FCT52T QS29FCT53T High Speed CMOS 8-Bit Bus Interface Register Transceivers QS29FCT2052T QS29 FCT2053T FEATURES/BENEFITS • Pin and function compatible to the Am2952/3 29FCT52/53 and 29FCT52/53T • CMOS power levels: <7.5 mW static

IDT71V256SL

Contextual Info: SPX* y VERY LOW POWER 3.3V CMOS FAST SRAM 256K 32K x 8-BIT IDT71V256SL In tegrated D evice T ech n o logy, Inc. FEATURES DESCRIPTION • Ideal for high-performance processor secondary cache, noteDook/sub-notebook cache, and other battery-operated applications

2157 ae

Contextual Info: QSFCT157/8T, 257/8T, 2157/8T, 2257/8T QS54/74FCT157T QS54/74FCT158T QS54/74FCT257T QS54/74FCT258T* High Speed CMOS Quad 2 Input Multiplexers Q QS54/74FCT2157T QS54/74FCT2158T QS54/74FCT2257T QS54/74FCT2258T* FEATURES/BENEFITS • Pin and function compatible to the 74F1/257/8

h9740

Abstract: k1917 B934 L9726 Y9846 H9817 n9831 l9735 9806 9826 320
Contextual Info: INTEGRATED DEVICE TECHNOLOGY, INC. QUALITY & RELIABILITY MONITORS January 1999 2975 Stender Way, Santa Clara, CA 95054 TEL: 800 345-7015 FAX: (408) 492-8674 QUALITY & RELIABILITY MONITOR REPORT January 1999 TABLE OF CONTENTS Section I: Introduction Section II:

CY8C29466

Abstract: CY8C2946624SX
Contextual Info: CY8C29466, CY8C29566 CY8C29666, CY8C29866 PSoC Programmable System-on-Chip 1. Features • ■ ■ ■ ■ Powerful Harvard Architecture Processor ❐ M8C Processor Speeds to 24 MHz ❐ Two 8x8 Multiply, 32-Bit Accumulate ❐ Low Power at High Speed ❐ 3.0V to 5.25V Operating Voltage

Contextual Info: CY8C27143, CY8C27243 CY8C27443, CY8C27543, CY8C27643 PSoC Programmable System-on-Chip Features • ■ ■ ■ ■ Powerful Harvard Architecture Processor ❐ M8C processor speeds to 24 MHz ❐ 8x8 multiply, 32-bit accumulate ❐ Low power at high speed

taco

Abstract: 74HC C344 CY7C344 CY7C344B ULTRA37000TM CY7C344-25JC Signal Path Designer C3447
Contextual Info: USE ULTRA37000TM FOR ALL NEW DESIGNS CY7C344B 32-Macrocell MAX EPLD Features densest EPLD of this size. Eight dedicated inputs and 16 bidirectional I/O pins communicate to one logic array block. In the CY7C344 LAB there are 32 macrocells and 64 expander

IDT71V256

Abstract: IDT71V256SA P28-2 A 3101 8 pin
Contextual Info: IDT71V256SA 3.3V CMOS STATIC RAM 256K 32K x 8-BIT  LOW POWER 3.3V CMOS FAST SRAM 256K (32K x 8-BIT) COMMERCIAL TEMPERATURE RANGE PRELIMINARY IDT71V256SA Integrated Device Technology, Inc. FEATURES • Ideal for high-performance processor secondary cache

CY8C29466

Abstract: ASC10 CY8C29866 block diagram PRT2
Contextual Info: CY8C29466, CY8C29566 CY8C29666, CY8C29866 PSoC Programmable System-on-Chip Features • ■ ■ ■ ■ Powerful Harvard-architecture processor ❐ M8C processor speeds to 24 MHz ❐ Two 8x8 multiply, 32-bit accumulate ❐ Low power at high speed ❐ 3.0 V to 5.25 V operating voltage

Contextual Info: CY8C27143,CY8C27243 CY8C27443,CY8C27543 CY8C27643 PSoC Programmable System-on-Chip PSoC® Programmable System-on-Chip Features • ■ ■ ■ ■ Powerful Harvard-architecture processor ❐ M8C processor speeds up to 24 MHz ❐ 8 x 8 multiply, 32-bit accumulate

CY7C64013

Abstract: CY7C64013-SC CY7C64113
Contextual Info: CY7C64013 CY7C64113 Full-Speed USB 12-Mbps Function Cypress Semiconductor Corporation Document #: 38-08001 Rev. *A • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Revised January 30, 2004 CY7C64013 CY7C64113 TABLE OF CONTENTS 1.0 FEATURES . 5