PROGRAMMABLE Search Results

Contextual Info: TIBPAL22V10-20M HIGH-PERFORMANCE IMPACT-X PROGRAMMABLE ARRAY LOGIC CIRCUITS SRPSQ12A - D3523, JUNE 1 9 9 0 -R E V IS E D MARCH 1992 JT P A C K A G E Second-Generation PLD Architecture TO P V IE W High-Performance Operation: fmax (External Feedback). . . 33.3 MHz

UZ210

Abstract: P1275
Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TMM27512ADI-20, TMM27512ADI-25 DESCRIPTION The TMM27512ADI is a 65,536 words * 8 bits ultraviolet light erasable and electri­ cally programmable read only memory. For read operation, the TMM27512ADI's access time is 200ns/250ns, and the TMM27512ADI

Contextual Info: TMS28C64 65,536-BIT ELECTRICALLY ERASABLE PROGRAMMABLE READ-ONLY MEMORY • Organization 8K x 8 • Single 5-V Power Supply ± 10% N AND J PACKAGES (TOP VIEW } Q 1 U A 12C 2 A7C 3 Compatible with Existing 64K M O S EPRO M s. PRO M s. R O M s, and EEPR O M s

Contextual Info: TL16C550C ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL SLLS177B- MARCH 1994 - REVISED MARCH 1996 • Programmable Auto-RTS and Auto-CTS • In Auto-CTS Mode, CTS Controls Transmitter • In Auto-RTS Mode, RCV FIFO Contents and Threshold Control RTS

12v 1200mah battery NiMH

Abstract: 12v 1200mah nimh battery db opera 415 12v 1200mah nimh 12v 1200mah battery
Contextual Info: y UCC2956 UCC3956 mmm UNITRODE Switch Mode Lithium-Ion Battery Charger Controller FEATURES Precision 4.1V Reference 1% High Efficiency Battery Charger Solution Average Current Mode Control from Trickle to Over Charge Resistor Programmable Charge Currents

54256AP

Abstract: TC54256AF 54256a TC54256P 54256AF tmm23256p 27256D tc54256ap
Contextual Info: TOSHIBA TC54256AP/AF SILICON STACKED GATE CMOS 32,768 WORD x 8 BIT ONE TIME PROGRAMMABLE READ ONLY MEMORY D e s c rip tio n The TC54256AP/AF is a 32,768 word x 8 bit one time programm able read only m em or/ m olded in a 28-pin plastic package. The TC54256AP/AF’s access time is 200ns and it has a low power standby m ode which reduces the power dissipation without

Field-Programmable Gate Arrays

Contextual Info: TPC14 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS ^ JA N U A RY 1993 • • • • • • Gate Capacities from < 1,000 to > 10,000 Gate Array Gates Gate Capacities from < 2,500 to > 25,000

A1051

Contextual Info: TMS27C291, TMS27C292 16.384-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORIES TMS27PC291 16,384-BIT PROGRAMMABLE READ-ONLY MEMORY SEPTEM BER 1986 —REVISED APRIL 1988 Organization . . . 2K x 8 J AND N PA C KA G E Pin Compatible with Existing 2K x 8 Bipolar/High-Speed CM OS EPROMs

27C020-12

Abstract: 27PC020-12 LS020 A1025 LS020B 2097152-BIT
Contextual Info: TMS27C020 2097152-BIT UV ERASABLE PROGRAMMABLE TMS27PC020 2097152-BIT PROGRAMMABLE READ-ONLY MEMORY SM LS020B - N O V E M B E R 1990 - REVISED JU N E 1995 • Organization . . . 256K x 8 J PACKAGE TOP VIEW • Single 5-V Power Supply • Operationally Compatible With Existing

TLP639

Abstract: TLP639-F TLP639F VDE-0110
Contextual Info: TLP639F GaAs IRED a PHOTO-TRANSISTOR TENTATIVE DATA Unit in mm OFFICE MACHINE HOUSEHOLD USE EQUIPMENT 6 5 4 PROGRAMMABLE CONTROLLERS AC/DC-INPUT MODULE TELECOMMUNICATION The TOSHIBA TLP639F consists of two gallium arsenide infrared emitting diode connected inverse parallel,

Contextual Info: TOSHIBA TC58V64FT/DC TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 64-MBIT 8M X 8 BITS CMOS NAND E2PROM DESCRIPTION The TC58V64FT/DC is a single 3.3-V 64-Mbit (69,206,016-bit) NAND electrically erasable and programmable read-only memory (NAND E2PROM) organized as 528 bytes X 16 pages X 1024 blocks.

Contextual Info: SILICON STACKED GATE MOS INTEGRATED CIRCUIT - TC57256AD-12,-120,-150 32 , 768 W O R D x 8 B I T C M O S UV ERASABLE A N D ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY IDESCRIPTIONI The TC57256AD is a 32,768 word x 8 bit CMOS ultraviolet light erasable and electri­

T5CD

Contextual Info: U M C U M 2661 Enhanced Programmable Communications Interface EPCI Features • Automatic serial echo mode (échoplex) ■ Local or remote maintenance loop back mode Baudrate: de to IM bps (1X clock) - de to 62.5K bps (16X clock) - de to 15.625K bps (64X clock)

Contextual Info: GaAÄAs IRED & PHOTO-DIODE ARRAY TLP590B ¡TLP590B TELECOMMUNICATION PROGRAMMABLE CONTROLLERS MOS GATE DRIVER MOS FET GATE DRIVER U n it in mm The T O S H IB A TLP590B consists of an aluminum galium arsenide infrared emitting diode optically coupled to a series connected photo­

ksy 11

Contextual Info: y UC1875/6/7/8 UC2875/6/7/8 UC3875/6/7/8 UNITRODE Phase Shift Resonant Controller FEATURES DESCRIPTION • Zero to 100% Duty Cycle Control • Programmable Output Turn-On Delay The UC1875 family of integrated circuits implements control of a bridge power stage by phase-shifting the switching of one half-bridge with respect

TC57256AD

Contextual Info: TOSHIBA TC57256AD-12 TC57256AD-120 TC57256AD-150 SILICON STACKED GATE CMOS 32,768 WORD x 8 BIT CMOS UV ERASABLE AND ELECTRICALLY PROGRAMMABLE READ ONLY MEMORY Description The TC57256AD is a 32,768 word x 8 bit CMOS ultraviolet light erasable and electrically programmable read only memory. It

TIBPSG507AC

Contextual Info: TIBPSG507AC 13 x 80 x 8 PROGRAMMABLE SEQUENCE GENERATOR I SRPS002D - D3029. MAY 1 9 8 7 -R E V IS E D NO VEM BER 1995 • JT O R 58-MHz Max Clock Rate N T P A C K A G E T O P V IE W • | • • • • Ideal for Waveform Generation and High-Performance State Machine

27C510

Abstract: pc51020 SMJ27C510 pc510-20
Contextual Info: TMS27C510 524 288-BIT ERASABLE PROGRAMMABLE READ-ONLY MEMORY TMS27PC510 524 288-BIT PROGRAMMABLE READ-ONLY MEMORY SMLS51OA-AUGUST 1990-REVISED JANUARY 1993 J AND N PACKAGESÎ TOP VIEW Organization . . . 64K x 8 Single 5-V Power Supply V pp [ Pin Compatible With Existing 1 Meg MOS

Contextual Info: UC1849 UC2849 UC3849 UNITRODE Secondary Side Average Current Mode Controller FEATURES DESCRIPTION • Practical Secondary Side Control of Isolated Power Supplies • 1MHz Operation • Differential AC Switching Current Sensing • Accurate Programmable Maximum Duty Cycle

TL14310

Abstract: TL1431C SLVS062B
Contextual Info: TL1431C, TL1431Q, TL1431Y PRECISION PROGRAMMABLE REFERENCES SLVS062B - DECEMBER 1991 - REVISED AUGUST 199S D PACKAGE TOP VIEW 0.4% Initial Voltage Tolerance 0.1-Q Typical Output Impedance Fast Turn O n . . . 500 ns Sink Current Capability. . . 1 mA to 100 mA

42c27

Contextual Info: T E X A S IN S T R -CASIC/MEMORY} 42 Ô 96Ï725 1 I PROGRAMMABLE L0G|C 42C 27235 TEXAS D E § aTt.l7 aS 0 0 S 7 2 3 S I'NSTR <AS I C /MEMORY TYPES SN54PL333, SN54PL335, SN74PL333, SN74PL335 FIELD-PROGRAMMABLE LOGIC SEQUENCERS D2707r DECEMBER 1982 07 J OR N DUAL-IN-LINE PACKAGE

NS16C450N

Contextual Info: TL16C450 ASYNCHRONOUS COMMUNICATIONS ELEM ENT 0 3 0 9 6 , M A R C H 1 9 8 8 - R E V IS E O A P R IL 1 9 8 9 N DUAL-IN-LINE PACKAGE • Programmable Baud Rate Generator Allows Division of Any Input Reference Clock by 1 to 216 - 1 and Generates an Internal 16 X

18n8

Contextual Info: T IB P A D 18N8-6C HIGH-PERFORMANCE PROGRAMMABLE AD D RESS DECODER/NAND ARRAY D 3 0 8 6 , DECEMBER 1 9 8 7 Very High Speed Address Decoder Ideal for Use w ith High Speed Processors I/O Propagation Delay: 6 ns Max • Suitable for High Speed N A ND-NAND Logic

Contextual Info: SM/SMJ34061 VIDEO SYSTEM CONTROLLER JULY 1 98 7 • Generates User-Programmable Control Signals Horizontal Sync, Vertical Sync, and Blanking Which Support a Broad Range of Raster-Scan Display Systems with Varying Resolutions and Scan Rates S M J 3 4 0 6 1 G B . . . 68-P IN PGA