PORTE Search Results

CY7C09449PVA-AC

Abstract: 8c04 i486 PC MOTHERBOARD CIRCUIT diagram
Contextual Info: CY7C09449PVA-AC 128 Kb Dual-Port SRAM with PCI Bus Controller PCI-DP Features Functional Overview • 128 Kb of dual-ported shared memory ■ Master and target PCI Specification 2.2 compliant interface ■ Embedded host bridge capability ■ Direct interface to many microprocessors

IDT709079

Abstract: IDT709089
Contextual Info: 025/0251 CY7C09079/89/99 CY7C09179/89/99 PRELIMINARY 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow simultaneous access of the same memory location • 6 Flow-Through/Pipelined devices — 32K x 8/9 organizations CY7C09079/179

Leaf Spring Connector Systems

Contextual Info: FKH-Sicherungshalter mit 90° Anschluß für Sicherungseinsätze bis 80 V / FKH-Fuseholder with 90° connection for fuse links up to 80 V / FKH-Porte-fusible avec connexion 90° pour fusibles jusqu'à 80 V Gehäuse / Housing / Corps: aus Thermoplast / out of thermoplastic / de matière thermoplastique

fusibles

Abstract: AS2003 rapide
Contextual Info: FK-Inlinehalter für Sicherungseinsätze bis 32 V / FK-Inlineholder for fuse links up to 32 V / FK-Porte-fusible-inline pour fusibles jusqu'à 32 V Gehäuse / Housing / Corps: aus Thermoplast / out of thermoplastic / de matière thermoplastique Anschlüsse / Connections / Connexions:

idt7134

Abstract: CY7C1342 CY7C135
Contextual Info: fax id: 5203 ,.V.Ï.Ï.V.^ y nr' C Y 7C 135 Æ C Y p R E S S C Y 7C 1342 4K x 8 Dual-Port Static RAMs and 4K x 8 Dual-Port Static RAM with Semaphores Features True Dual-Ported memory cells which allow sim ulta­ neous reads of the sam e memory location 4K x 8 organization

A15LC

Abstract: A14L A14LC A12LC CY7C09099V 751V
Contextual Info: “ tv * I PRELIMINARY CY7C09079V/89V/99V CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9 Synchronous Dual-Port Static RAM Features • True Dual-Ported memory cells which allow sim ulta­ neous access of the same memory location • 6 Flow-Through/Pipelined devices

PFR 15T

Abstract: c3ke hcn 73 IDT709269 IDT709279 014L
Contextual Info: : mMMMMWMJ!. CY7C09269/79/89 CY7C09369/79/89 PRELIMINARY CYPRESS 16K/32K/64K x16/18 Synchronous Dual Port Static RAM • Low operating power Features — Active= 195 mA typical • True Dual-Ported mem ory cells which allow sim ulta­ neous access of the same memory location

Contextual Info: HIGH-SPEED 3.3V 8 K x 16 DUAL-PORT STATIC RAM IDT70V25S/L In te g ra te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • True Dual-Ported m em ory cells which allow sim ulta­ neous reads of the sam e m em ory location • H igh-speed access — Com m ercial: 25/35/55ns max.

Contextual Info: HIGH-SPEED 8K x 9 DUAL-PORT IDT7015S/L STATIC RAM I n t e g r a t e d D e v iz e T e c h n o lo g y , l i e . FEATURES: • True Dual-Ported m em ory cells which allow sim ulta­ neous reads of the sam e m em ory location • H igh-speed access — M ilitary: 20/25/35ns max.

Contextual Info: dt | ; HIGH-SPEED 16Kx 8 DUAL-PORT STATIC RAM IDT7006S/L In te g ra te d De v ic e T e ch n o lo g y, Inc. FEATURES: • • • True Dual-Ported m em ory cells w hich allow sim ulta­ neous access of the sam e m em ory location • H igh-speed access — M ilitary: 20/25/35/55/70ns max.)

Contextual Info: HIGH-SPEED 32K x 8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT709079S/L Integrated Device Technology, Inc. FEATURES: • • True Dual-Ported m em ory cells which allow sim ulta­ neous access of the sam e m em ory location • H igh-speed clock to data access

Contextual Info: HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM ydt IDT7015S/L Integrated De^/ice Technology, Inc. FEATURES: • True Dual-Ported m em ory cells w hich allow sim ulta­ neous access of the sam e m em ory location • H igh-speed access — M ilitary: 20/25/35ns max.)

Contextual Info: Integrated D e v ile Technology, li e . HIGH-SPEED 3.3V 64K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS PRELIMINARY IDT70V7288S/L FEATURES: DESCRIPTION: • 64K x 16 Bank-Switchable Dual-Ported SRAM Architecture — Four independent 16K x 16 banks

Contextual Info: HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM IDT7008S/L F eatu res * * * True Dual-Ported m em ory cells w hich allow sim ultaneous more u sin g the Master/Slave select when ca sca d in g more High-speed a c c e ss than one device_ - M ilitary: 25/35/55ns max.

Contextual Info: HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM IDT7015S/L FEATURES: * * True Dual-Ported memory cells which allow simultaneous reads of the sam e memory location * * * B u sy and Interrupt Flag - Military:20/25/35ns max. * On-chip port arbitration logic - Commercial: 12/15/17120125135ns (max.)

Contextual Info: HIGH-SPEED 3.3V 32K x 8 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V9079S/L Features: additional logic Full synchronous operation on both ports True Dual-Ported memory cells which allow simultaneous access of the same memory location * High-speed clock to data access

Contextual Info: •ft«»»* PRELIMINARY IDT7034S/L HIGH-SPEED 4 K x 18 DUAL-PORT STATIC RAM «««»5 *K ««:«! ^*SS»:S? •*»> ~ •«¿j F ea tu re s: * * True D ual-Ported m em ory cells which allow sim ultaneous using the M aster/Slave select w hen cascading m ore than

Contextual Info: In te g ra te d D e v ile T e c h n o lo g y , l i e . HIGH-SPEED 64K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS PRELIMINARY IDT707288S/L FEATURES: DESCRIPTION: • 6 4 K x 16 B ank-Sw itchable D ual-P orted S R A M Architecture - Four independent 16K x 16 banks

Contextual Info: i|g; m I | • ''• d m r 1 M L HIGH-SPEED 3.3V 16K x 36 | SYNCHRONOUS PIPELINED DUAL-PORT STATIC ra m PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: •$:»£ V HIGH-SPEED 3.3V 64K x 18 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3389S F ea tu re s: True Dual-Ported memory cells which allow simultaneous access of the same memory location * High-speed clock to data access * - Com m ercial: 5/6ns max.

Contextual Info: HIGH-SPEED 3.3V 32K x 16 SYNCHRONOUS DUAL-PORT STATIC RAM PRELIMINARY IDT70V927S/L In te g r a te d D e v iz e T e c h n o lo g y , l i e . FEATURES: • True Dual-Ported memory cells which allow simulta­ neous access of the same memory location • High-speed clock to data access

Contextual Info: 1»ill 1IFV1F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access

Contextual Info: P R U tflO G O M V in te i l n t e l 486 TM DX CPU-CACHE CHIP SET 50 MHz Intel486 DX Microprocessor, 82495DX Cache Controller, and 82490DX Dual Ported Intelligent Cache SRAM • 50 MHz Intel486™ DX CPU — RISC Integer Core with Frequent Instructions Executing in One Clock

Contextual Info: HIGH-SPEED 3.3V 32K x 16 BANK-SWITCHABLE DUAL-PORTED SRAM WITH EXTERNAL BANK SELECTS PRELIMINARY IDT70V7278S/L Features 32K x 16 Bank-Switchable Dual-Ported SRAM Architecture * processor communications; interrupt option Interrupt flags with programmable masking