PIN CONFIGURATION 555 Search Results

Contextual Info: WS27C210L Military 64 K x 16 CMOS EPROM KEY FEATURES Ultra-High Performance JEDEC Standard Pin Configuration — 120 ns Access Time — 40 Pin CERDIP Package — 44 Pin Leadless Chip Carrier CLLCC — 44 Pin Leaded Chip Carrier (CLDCC) DESC SMD No. 5962-86805

MICROPROCESSOR 68000

Abstract: 900mu
Contextual Info: S ig n e tic s I I 68000 16-/32-Bit Microprocessor I Product Specification Military Custom er Specific Products I DESCRIPTION PIN CONFIGURATION PIN CONFIGURATION The 6 80 0 0 is th e first im plem entation of th e 6 8 0 0 0 1 6 /3 2 bit m icrop ro cesso r a rch i­

WS27C210L-15

Abstract: WS27C210L-15CMB
Contextual Info: WS27C210L Military 64K x 16 CMOS EPROM KEY FEATURES • JEDEC Standard Pin Configuration Ultra-High Performance — 120 ns Access Time — 40 Pin CERDIP Package DESC SMD No. 5962-86805 EPI Processing — 44 Pin Leadless Chip Carrier CLLCC — 44 Pin Leaded Chip Carrier (CLDCC)

Contextual Info: * SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 475ps propagation delay 2.8GHz toggle frequency Internal 75KH input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

Contextual Info: * SY10EL51 SY100EL51 DIFFERENTIAL CLOCK D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 475ps propagation delay 2.8GHz toggle frequency Internal 75KH input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

SY10EL51ZC

Contextual Info: * SY10EL51 SY100EL51 DIFFER ENTIA L CLO CK D FLIP-FLOP SYNERGY SEMICONDUCTOR DESCRIPTION FEATURES 475ps propagation delay 2.8GHz toggle frequency Internal 75K£2 input pull-down resistors ESD protection of 2000V Available in 8-pin SOIC package PIN CONFIGURATION/BLOCK DIAGRAM

512 eeprom dip 32-pin

Abstract: WE512K8-XCX WE256K8-XCX WE128K8-XCX WE512K8 256KX8
Contextual Info: WE512K8, WE256K8, WE128K8-XCX 512Kx8 CMOS EEPROM, WE512K8-XCX, SMD 5962-93091 512KX8 BIT CMOS EEPROM MODULE FIG. 1 PIN CONFIGURATION TOP VIEW FEATURES • Read Access Times of 150, 200, 250, 300ns ■ JEDEC Standard 32 Pin, Hermetic Ceramic DIP Package 300

Contextual Info: SA556F.N • SE556N.F • NE556F.N • SE556C.F.N FEATURES PIN CONFIGURATION • Timing from microseconds to hours • Replaces two 555 timers • Operates in both astable and monostable modes • High output current • Adjustable duty cycle • TTL compatible

555 off delay timer circuits

Abstract: 556 timer 555 timer 556 Dual on off Timer 99982
Contextual Info: Product specification Philips Semiconductors Military Linear Products Dual timer 556-1 PIN CONFIGURATION DESCRIPTION FEATURES • Turn-off time less than 2jis • Max. operating frequency greater than 500kHz • Timing from microseconds to hours • Replaces two 555 timers

timer 555

Abstract: PPM 555 TIMER 555 missing pulse detector 555 missing pulse detector circuit 555 timer on and off duration
Contextual Info: Philips Semiconductors Military Linear Products Product specification Timer 555 FEATURES PIN CONFIGURATION • Sequential timing • Turn-off time less than 2|is • Time delay generation • Max. operating frequency greater than 500kHz • Timing from microseconds to hours

NE555n PIN DIAGRAM

Abstract: ne555 SMD Signetics 555 timer signetics 555 SE555CN NE555 PHILIPS NE555D-T NE555N timer SE555N SA555D
Contextual Info: INTEGRATED CIRCUITS NE/SA/SE555/SE555C Timer Product data Supersedes data of 1994 Aug 31 Philips Semiconductors 2003 Feb 14 Philips Semiconductors Product data Timer NE/SA/SE555/SE555C DESCRIPTION PIN CONFIGURATION The 555 monolithic timing circuit is a highly stable controller capable

xds pnp

Abstract: Q62702-C2383 xds transistor marking XDS sot23 Bcr555 SOT-23 marking XDs
Contextual Info: SIEMENS BCR 555 PNP Silicon Digital Transistor • Switching circuit, inverter, interface circuit, driver circuit • Built in resistor Rn = 2.2kii, R2 = 10kii Type Marking Ordering Code Pin Configuration BCR 555 XDs 1=B Q62702-C2383 Package 2=E 3=C SOT-23

Contextual Info: SIEMENS BCR 555 PNP Silicon Digital Transistor •Switching circuit, inverter, interface circuit, driver circuit >Built in resistor R-| = 2.2kÎ2, R2 = 10k£2 Type Marking Ordering Code Pin Configuration BCR 555 XDs Q62702-C2383 1=B Package 2=E 3=C SOT-23

SL00349

Abstract: NE555 PHILIPS SE555C NE555D NE555N SA555D SA555N SE555CN SE555N ne 556 timer
Contextual Info: INTEGRATED CIRCUITS NE/SA/SE555/SE555C Timer Product data Supersedes data of 1994 Aug 31 Philips Semiconductors 2003 Feb 14 Philips Semiconductors Product data Timer NE/SA/SE555/SE555C DESCRIPTION PIN CONFIGURATION The 555 monolithic timing circuit is a highly stable controller capable

9508

Abstract: CK-408 ICS950812
Contextual Info: DATASHEET Frequency Generator with 200MHz Differential CPU Clocks Pin Configuration VDDREF X1 X2 GND PCICLK_F0 PCICLK_F1 PCICLK_F2 VDDPCI GND PCICLK0 *E_PCICLK1/PCICLK1 PCICLK2 *E_PCICLK3/PCICLK3 VDDPCI GND PCICLK4 PCICLK5 PCICLK6 VDD3V66 GND 66MHZ_OUT0/3V66_2

TL083

Abstract: 5534 bpa 5534 philips
Contextual Info: Product specification Philips Semiconductors Military Linear Products Low-noise operational amplifiers 5534/5534A PIN CONFIGURATION FEATURES DESCRIPTION • Small-signal bandwidth: 10MHz The 5534 is a high-performance low-noise operational amplifier. Compared to other

Contextual Info: ICS9250-24 Integrated Circuit Systems, Inc. Integrated Buffers for PIII Recommended Application: General purpose peripheral clk gen, also for IA64. Pin Configuration Features: • Effective power management scheme through PD# • 14.318MHz reference input

ICS951104

Abstract: 318M 48MHZ
Contextual Info: ICS951104 Preliminary Product Preview Integrated Circuit Systems, Inc. Programmable Timing Control HubTM for P4TM Pin Configuration AVCO_CORE X1 X2 Output Features: GND • 2 - Pairs of differential CPU clocks differential current mode VDD 50M/REF_SEL_REF0

ACT 600

Contextual Info: ICS9250-24 Integrated Circuit Systems, Inc. Integrated Buffers for PIII Recommended Application: General purpose peripheral clk gen, also for IA64. Pin Configuration Features: • Effective power management scheme through PD# • 14.318MHz reference input

1CM7555

Abstract: 555 timer truth table pulse position modulation using 555 ICM7555IN ICM7555ID ICM7555CN ICM7555CD pulse width modulation using 555 Applications of monostable multivibrator using timer 555 ne 7555 timer
Contextual Info: Philips Semiconductors-Signetics Linear Products Product specification General purpose CMOS timer ICM7555 PIN CONFIGURATION DESCRIPTION FEATURES The ICM7555 is a CMOS timer providing significantly improved performance over the standard NE/SE555 timer, while at the same

SA2420

Abstract: SA2421 SA2421DH TSSOP24 Transceiver 20 GHz block Diagram
Contextual Info: INTEGRATED CIRCUITS SA2421 2.45 GHz low voltage RF transceiver Product specification Supersedes data of 2000 Feb 11 Philips Semiconductors 2000 Mar 13 Philips Semiconductors Product specification 2.45 GHz low voltage RF transceiver SA2421 DESCRIPTION PIN CONFIGURATION

8 output decoder relay driver

Abstract: NE5090 NE5090N NE5090D SA5090D SA5090N 28V relay latch triac control 16-pin SA5090 NE590
Contextual Info: Philips Semiconductors Linear Products Product specification Addressable relay driver NE/SA5090 DESCRIPTION PIN CONFIGURATION The NE/SA5090 addressable relay driver is a high-current latched driver, similar in function to the 9934 address decoder. The device

Contextual Info: ICS951416 Integrated Circuit Systems, Inc. Preliminary Product Preview System Clock Chip for ATI RS480 Pin Configuration X1 X2 VDD48 USB_48MHz GND NC SCLK SDATA ~FS2 ~CLKREQA# ~CLKREQB# SRCCLKT7 SRCCLKC7 VDDSRC GNDSRC SRCCLKT6 SRCCLKC6 SRCCLKT5 SRCCLKC5 GNDSRC

Contextual Info: Integrated Circuit Systems, Inc. ICS950810 Frequency Generator with 200MHz Differential CPU Clocks Recommended Application: CK-408 clock for BANIAS processor/ ODEM and MONTARA-G chipsets. Pin Configuration Output Features: • 3 0.7V Differential CPU Clock Pairs