PIMM Search Results

PR2000

Abstract: PR3000A MIPS R3000A R2000 mips processor
Contextual Info: PERFORMANCE INTEGRATED MIPS MODULE PIMM” FEATURES: • • bus snooper to assist In maintaining cache coherency in multiprocessor systems Single VLSI multichip module contains: • PR3000A CPU • PR3010A FPA ■ P4C92815 x4 Bicameral SCRAM contains: • 32 KBytes each of address latched

Contextual Info: 10 ;È NOTES . / : ^ A L L C P , — 5 ^ J L o K f M TERMINAL ¡PHOSPHOR BRONZE t = 0 .2 UL 9 4 V-0 E HOUSINGS.F.LCP.WHITE .UL94V-0 ) 2. PLATING i&SnP ^# 000 + 0.25 pimM I N. CONTACT AREAiGOLD 0 .2 5 u m M IN . ^ ffl^ + I.O u m M I N. SOLDER TAIL AREA;TIN-LEAD LO pm M I N.

Contextual Info: iiN C A r \ / T L i n t A B _ PIMMLDIMlDlNl^lRiV ltci151 I T E C H N O L O G Y Dual ± 15V Chopper Stabilized Op Amp with Internal Capacitors September 1991 KflTURCS DCSCRIPTIOfl • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ The LTC1151 is a high voltage, high performance dual

MPS 2112

Abstract: dd1555 R3000A PR2000 PR31 MIPS R2000 PR3010A PR3000A td70c R2000 mips processor
Contextual Info: PE R FO R M A N CE SEMICONDUCTOR 50E D 7 0 b 2 S li 7 • ÜDD1SS1 PERFORMANCE INTEGRATED MIPS MODULE PIMM" 713 «PSC PffiEBJIIlflDNAIHIV FEATURES: ■ Single VLSI muttichip module contains: • PR3000A CPU • PR3010A FPA • PR3100A Write/Read and Parity Buffer

Contextual Info: l p 13« PIMMMGT [PIF3EWEW in te l. 80L188EA8 16-BIT HIGH INTEGRATION EMBEDDED PROCESSOR • 3V Operation, Vcc = 2.7V-5.5V ■ Full Static Operation ■ True CMOS Inputs and Outputs Integrated Feature Set — Static 186 CPU Core — Power Save, Idle and Powerdown

Contextual Info: >kl>1Xiykl 19-0149; Rev 2; 9/95 PIMM S V /3.3V/3V 2A Step-Down, Sw itch-M ode DC-DC R egulators These regulators have excellent dynamic and transient response characteristics, while featuring cycle-by-cycle cur­ rent limiting to protect against overcurrent faults and shortcircuit output faults. They also have a wide 8V to 40V input

se 094

Contextual Info: C A TA LO G L IS T IN O MICRO SWITCH a B 2-2R Q 1-D 6 SWITCH-BASIC Pimm * fanurous-Mifvwtu m m ret amunr www, tum * FEO. MFR. CODE 9 1 9 2 9 <0 o oc OJ o 1 N uj < CL 2 is Is3 K QZ ~ U 3 n » R E V IS IO N S A CO 14866 J 1D AUG 60 ÒBSDWG B C0I8857 H BW

Contextual Info: MEMORY 2Mx84BIT SYNCHRONOUS DYNAMIC RAM SO-PIMM msmmmêmâmïmm 144-pin, 2 Clock, 1-bank, based on 2 M x 8 Bit SDRAMs with SPD DESCRIPTION The Fujitsu MB8502S064AE is afully decoded, CMOS Synchronous Dynamic Random Access Memory SDRAM Module consisting of eight MB81117822A devices which organized as two banks of 2 M x 8 bits and a 2K-bit

PR2000

Abstract: PR3000A ha 1166 x R2000 mips processor
Contextual Info: PERFORMANCE SEMI CON DU CT OR SDE D 7 0 b 2 S lì 7 • 00D15S1 PERFORMANCE INTEGRATED MIPS MODULE PIMM" 713 «PSC PREILDOyDDNAIRV FEATURES: ■ Single VLSI muttichip module contains: • PR3000A CPU • PR3010A FPA • PR3100A Write/Read and Parity Buffer

Contextual Info: MC9S12ZVHY-Family Reference Manual HCS12 Microcontrollers MC9S12ZVHYRMV1 Rev. 1.00 09/2013 freescale.com To provide the most up-to-date information, the revision of our documents on the World Wide Web will be the most current. Your printed copy may be an earlier revision. To verify you have the latest information

Contextual Info: PACE1753 SINGLE CHIP, 40MHz CMOS MMU/COMBO 4 FEATURES Implements the MIL-STD-1750A Instruction Set Architecture for Memory Management and Protection of up to 1 Megaword. A ll mapping memory 10,240 bfts for both the MMU and BPU functions are Included on the chip.

Contextual Info: SIEMENS 256 K x 16-Bit Dynamic RAM HYB 514171BJ-60/-70 Low Power 256 K x 16-Bit Dynamic RAM with Self Refresh HYB 514171BJL-60/-70 Advanced Inform ation 262 144 w ords by 16-bit organization 0 to 70 °C operating temperature Fast access and cycle time Low Power dissipation

generator cr 665 bosch

Abstract: BOSCH 0 281 002 709 MC9S12ZVM
Contextual Info: MC9S12ZVM-Family Reference Manual HCS12 Microcontrollers Rev. 1.3 20 JAN 2014 MC9S12ZVMRMV1 freescale.com To provide the most up-to-date information, the document revision on the Internet is the most current. A printed copy may be an earlier revision. To verify you have the latest information available, refer to :

Z3001

Contextual Info: AP * 3 6 » S / n X - f v =i- * * Super Miniature Pushbutton Switches Non-washable •Specifications '{ ± m 5Ë fè W± : AC/DC48V 50mA g ' h : AC/DC20mV luA 50m Q W T m » j± Îê M iê i/t (AC200/UV 1.5mA) AC500V 1-8-M 10.000M Q mJz. IS %. ÉK) ^ np

PIMM

Abstract: HP8657D
Contextual Info: ^ HEWLETTPACKARD Silicon Bipolar RFIC 100 MHz Vector Modulator Technical Data HPMX-2006 F eatures P lastic SO-16 Package • 26 - 260 MHz Output Frequency • -6 dBm Peak Poat • Unbalanced 50 Q Ouptut Match •Internal 90° Phase Shifter • 5 V, 15 mABias

delta dps 298 cp 2A

Abstract: bcm 5241 a dms map ntt bc 574 crossreferences A6-A15 BMS 13-60 wire xxnx
Contextual Info: MPC8349E PowerQUICC II Pro Integrated Host Processor Family Reference Manual Supports MPC8349E MPC8347E MPC8343E MPC8349E Rev. 1 8/2005 How to Reach Us: Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor

broadcom BCM 4360

Abstract: broadcom BCM 4331 bcm 4330 programming Guide MPC8360ERM broadcom BCM 4335 BCM 4331 Broadcom BCM 4341 BCM 4334 lcd ibm pinout bcm 4339
Contextual Info: MPC8360E PowerQUICC II Pro Integrated Communications Processor Family Reference Manual MPC8360ERM Rev. 2 05/2007 How to Reach Us: Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370

Contextual Info: PaceMips PR4000PC CPU advance information 64-BIT THIRD GENERATION RISC PROCESSOR WITH MMU, FPA, & PRIMARY CACHES FEATURES • Superpipelined FPA: - 32/16 en try 32/64 b it re g iste r file in a 32-bit mode - 32 entry 64-bit register file in 64-bit mode

TT-09

Abstract: 15534
Contextual Info: DATA CONTAINED IN THIS DOCUMENT IS PROPRIETARY TD TRDMPETER ELECTRONICS INC, AND SHALL NOT 8E DISCLOSED, COPIED DR USED FOR PROCUREMENT OR MANUFACTURE WITHDUT EXPRESS WRITTEN PERMISSION OF TROMPETER ELECTRONICS INC. _ REVISIONS REV 5-0010 □ATE DESCRIPTION

AN2919 DFSRR

Abstract: AN2919 MPC8349ERMAD MPC8349EA MPC8349 MPC8349E R100M MPC8349EARM MPC8349EARMAD processor family reference manual
Contextual Info: Freescale Semiconductor Addendum Document Number: MPC8349EARMAD Rev. 1.1, 05/2007 Errata to MPC8349EA PowerQUICC II Pro Integrated Host Processor Family Reference Manual, Rev. 1 This errata describes corrections to the MPC8349EA PowerQUICC™ II Pro Integrated Host Processor

Contextual Info: User’s Manual 16 RL78/G1C User’s Manual: Hardware 16-Bit Single-Chip Microcontrollers All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

R5F10268

Abstract: R5F102AA R01US0015E
Contextual Info: User’s Manual 16 RL78/G12 User’s Manual: Hardware 16-Bit Single-Chip Microcontrollers All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

ST3215

Contextual Info: User’s Manual 16 RL78/G13 User’s Manual: Hardware 16-Bit Single-Chip Microcontrollers All information contained in these materials, including products and product specifications, represents information on the product at the time of publication and is subject to change by

MPC83xx

Abstract: E300 MPC8349 MPC83xx tsec
Contextual Info: Freescale Semiconductor Application Note Document Number: AN3373 Rev. 0, 04/2007 PowerQUICC II Pro MPC83xx PCI Agent Initialization by: David Smith Field Application Engineering Raleigh, NC In many designs, the PowerQUICC™ II Pro (MPC83xx) operates as a peripheral component interconnect (PCI) agent