Atlas V quantum
Abstract: 132217 RCA-Y PM7324 Atlas IV quantum wsa0
Contextual Info: PM7324 S/UNI-ATLAS S/UNI-ATLAS DATASHEET PMC-1971154 ISSUE 7 S/UNI-ATM LAYER SOLUTION PM7324 S/UNI-ATLAS SATURN USER NETWORK INTERFACE ATM LAYER SOLUTION DATASHEET ISSUE 7: JANUARY, 2000 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
|
Original
|
pm7324pmc-1971154pmc-970622atlas v quantum+4132217rca-yatlas iv quantumwsa0
|
PDF
|
15 K26 011110 drivers
Abstract: MT90220 MT9045 MT90503 MT90503AG MT90528 MT9072 MT9076
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet Features September 2003 • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs • AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+8mt90503ag16-bit15 k26 011110 driversmt90220mt9045mt90528mt9072mt9076
|
PDF
|
43 0225h display module
Abstract: 0221H ADM6926
Contextual Info: Data Sheet, Rev. 1.03, September 2005 ADM6926 26 Port 10/100 Mbit/s Ethernet Switch Controller ADM6926 Communication CPE N e v e r s t o p t h i n k i n g . Edition 2005-09-12 Published by Infineon Technologies AG, St.-Martin-Strasse 53, 81669 München, Germany
|
Original
|
adm692643 0225h display module0221h |
PDF
|
MT9045
Abstract: MT90503 MT90503AG MT90528 MT9072 MT9076 15 K26 011110 drivers 14K25 894h 0822H1
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet DS5509 Features • • • • • • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vcds550964kbps+11af-vtoa007816-bitmt9045mt90503agmt90528mt9072mt907615 k26 011110 drivers14k25894h0822h1
|
PDF
|
3504F
Abstract: INJU3504L NJU3504 NJU3504L PHY10 QFP-44 cmos schmit ml185
Contextual Info: NJU3504 PRELIMINARY 4-BIT SINGLE CHIP M ICRO CO NTRO LLER • GENERAL DESCRIPTION The NJU3504 is the C-MOS 4-bit Single Chip Micro Controller consisted of the 4-bit CPU Core, Input / Output Selectable I/O ports, Program ROM, Data RAM, Dual Timer/Counter, 8-bit Serial Interface, 8-bit A/D Converter,
|
OCR Scan
|
nju3504nju3504fnju3504l3504f+5inju3504lphy10qfp-44cmos schmitml185
|
PDF
|
MSB77-7
Abstract: MSB77 kje t9 kje x3 PJO 186 NJU3504 7D75 lfh 1001 3504F QFP-44
Contextual Info: • • • • • • 8 tf-y S!5> H >J h A/D sa-Mi * « * ï f ï lS f n f al> T Vf tïj>21 o o ü a s ft^ 5 : « ABS • SW&fcgH 4 { » » , ÿ - fv l X N v 2 , v 'JT JU A iÜ * • C-MOS W fi • W& QFP —44/SD I P —4 2 • • • • t s i * i
|
OCR Scan
|
nju3504nju3504fnju3504lnju3504li+9msb77-7msb77kje t9kje x3pjo 1867d75lfh 10013504fqfp-44
|
PDF
|
CBD10
Abstract: intel 7882 MARKING 09F PHAST-12E TXC-05802B TXC-05810 TXC-06212 SA 6356
Contextual Info: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or
|
Original
|
cubit-622txc-058058/16-bittxc-05805-mb+8cbd10intel 7882marking 09fphast-12etxc-05802btxc-05810txc-06212sa 6356
|
PDF
|
EDLB4
Abstract: RY 485 ESA 132217 upc 451 PM7328 uaf41 LB07 R/nd 32
Contextual Info: PM7328 S/UNI-ATLAS-1K800 STANDARD PRODUCT DATASHEET ISSUE 2 ATM LAYER SOLUTION :4 3: 19 PM PMC-2010142 an ua ry ,2 00 3 11 PM7328 Su nd ay ,0 5J S/UNI-ATLAS-1K800 sil ico ne xp er to n ATM LAYER SOLUTION PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 2: JUNE 2001
|
Original
|
pm7328s/uni-atlas-1k800pmc-2010142pmc-1971154+7edlb4ry 485 esa132217upc 451uaf41lb07r/nd 32
|
PDF
|
abb ac drive circuit diagram
Contextual Info: DATASHEET PM PMC-971154 ISSUE 5 p r e li m in a r y STANDARD PRODUCT | ^ I \ # I • PMC-Sierra, Inc. PM7324 sajni-a t l a s S/UNI-A TM LA YER SOLUTION PM7324 S/UNI-ATLAS SATURN USER NETWORK INTERFACE ATM LAYER SOLUTION DATASHEET PRELIMINARY ISSUE 5: JAN 1999
|
OCR Scan
|
pmc-971154pm7324dged14431x31+31d04111d05dld3abb ac drive circuit diagram
|
PDF
|
T25 49f
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet Features September 2003 • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs • AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+216-bitt25 49f
|
PDF
|
H100I
Abstract: H100F
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet DS5509 Features • • • • • • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+316-bith100ih100f
|
PDF
|
0724H
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet Features July 2003 • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs • AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+216-bit0724h
|
PDF
|
H100F
Abstract: H100I
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet Features July 2003 • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs • AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+316-bith100fh100i
|
PDF
|
superpro
Abstract: PHY10 NJU3000 MOG30 PHY12
Contextual Info: NJU3000 Series !"ADDRESSING PERIPHERAL REGISTER, RAM and ROM addresses are selected as follows. ① PERIPHERAL REGISTER ADDRESSING Peripheral Register address is selected by Y’-register Y’ in instructions of accessing the data in peripheral registers (PHYn). NJU3503/3504/3505/3553/3554/3555/3905 have two kinds of Peripheral
|
Original
|
nju3000nju3503/3504/3505/3553/3554/3555/3905ju3101/3102/3501/3502/3151/3152/3551/3552superpro+3phy10mog30phy12
|
PDF
|
|
|
|
Contextual Info: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET DESCRIPTION FEATURES CUBIT®-Pro The CUBIT-3 is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CUBIT-3 devices, all
|
Original
|
txc-05804txc-05802btxc-058108/16-bit+1txc-05804-mb
|
PDF
|
A01H
Abstract: 9FF MARKING T-RA18 SA 6356
Contextual Info: CUBIT-622 Device Multi-PHY CellBus Access Device TXC-05805 DESCRIPTION • 622 Mbit/s performance • UTOPIA Level 1/2 interface 8/16-bit with support for 64 ports • Tandem operation for two devices, supporting dual CellBus cell switching in load sharing or
|
Original
|
txc-058058/16-bittxc-05805-mba01h+39ff markingt-ra18sa 6356
|
PDF
|
|
Contextual Info: CUBIT-622 Device DATA SHEET PRODUCT PREVIEW DESCRIPTION FEATURES The CUBIT-622 device is a single-chip solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus architecture. Such systems are built from a number of CUBIT-3,
|
Original
|
txc-058058/16-bittxc-05805-mb |
PDF
|
Atlas IV quantum
Contextual Info: PM7324 S/UNI-ATLAS PRELIMINARY STANDARD PRODUCT DATASHEET PMC-971154 ISSUE 6 S/UNI-ATM LAYER SOLUTION PM7324 S/UNI-ATLAS SATURN USER NETWORK INTERFACE ATM LAYER SOLUTION DATASHEET PRELIMINARY ISSUE 6: SEPTMEBER 1999 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
|
Original
|
pmc-971154pm7324pmc-970662atlas iv quantum |
PDF
|
946H
Abstract: MT90220 MT9045 MT90503 MT90503AG MT90528 MT9072 MT9076 FIRSTCOM crl 452
Contextual Info: MT90503 2048VC AAL1 SAR Data Sheet Features December 2004 • AAL1 Segmentation and Reassembly device capable of simultaneously processing up to 2048 bidirectional VCs • AAL1 cell format for "Structured DS1/E1 N x 64kbps Service" as per ATM Forum AF-VTOA0078.000 "Circuit Emulation Services
|
Original
|
mt905032048vc64kbpsaf-vtoa0078+10mt90503ag16-bit946hmt90220mt9045mt90528mt9072mt9076firstcomcrl 452
|
PDF
|
RCA 467
Abstract: transistor RCA 467 Atlas V quantum samsung LVDS 30 PIN 132217 RCA-Y PM7328 bss 108 jc 817
Contextual Info: PM7328 S/UNI-ATLAS-1K800 STANDARD PRODUCT DATASHEET PMC-2010142 ISSUE 2 ATM LAYER SOLUTION PM7328 S/UNI-ATLAS-1K800 ATM LAYER SOLUTION DATASHEET PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 2: JUNE 2001 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000
|
Original
|
pm7328s/uni-atlas-1k800pmc-2010142pmc-1971154+8rca 467transistor rca 467atlas v quantumsamsung lvds 30 pin132217rca-ybss 108jc 817
|
PDF
|
3504F
Abstract: NJU3504 NJU3504FA1 NJU3504L QFP44-A1
Contextual Info: NJU3504 PRELIMINARY 4-BIT SINGLE CHIP MICRO CONTROLLER • GENERAL DESCRIPTION The NJU3504 is the C-MOS 4-bit Single Chip Micro Controller consisting of the 4-bit CPU Core, Input / Output Selectable I/O ports, Program ROM, Data RAM, Dual Timer/Counter, 8-bit Serial Interface, 8-bit A/D Converter,
|
Original
|
nju3504nju3504fa1nju3504l3504f+1qfp44-a1
|
PDF
|
TXC-05804-MB
Abstract: sot marking code w17 W17 marking code sot 23
Contextual Info: CUBIT-3 Device CellBus Bus Switch TXC-05804 DATA SHEET CUBIT®-Pro The CUBIT-3™ is a single-chip VLSI solution for implementing low-cost ATM multiplexing and switching systems, based on the CellBus® architecture. Such systems are constructed from a number of CellBus devices, all
|
Original
|
txc-05804txc-05802bcubit-622txc-05805+5txc-058108/16-bittxc-05804-mbsot marking code w17w17 marking code sot 23
|
PDF
|
led display alarm clock ma 1042
Contextual Info: Semiconductor DATA BOOK C-MOS 4-BIT MICRO CONTROLLER NJU3000 Series VOLUME 2 Neu lapaziRadio Co.IicL [CAUTION] 1. NJRC strives to produce reliable and high quality semiconductors. NJRC's semiconductors are intended for specific applications and require proper maintenance
|
OCR Scan
|
nju300099-1cat14e-5led display alarm clock ma 1042 |
PDF
|
|
Contextual Info: 1.2 Gbps 8 port ATM Switch IDT SwitchBIOS Programmer’s Guide Revision 4.0.1 Date 4/28/1999 Table of Contents Chapter 1 INTRODUCTION. 4 1.1 Data Path Overview. 4
|
Original
|
|
PDF
|