PHL 625 Search Results

TDA 7378

Abstract: TDA 7822 block diagram baugh-wooley multiplier tda 12062 equivalent for tda 4858 ic free transistor equivalent book STD-80 4856 a 14 PIN DIP W908 LSI CMOS Technology
Contextual Info: D • A • T • A • B • O • O • K STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library April 1997 V SAMSUNG SAMSUNG ASIC STD80/STDM80 0.5µm 5V/3.3V Standard Cell Library Data Book  1997 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

tda 9592

Abstract: TDA 2310 verilog code for Modified Booth algorithm tda 7830 TDA 8344 sl 7221 KGL80 AO33 FD2S
Contextual Info: D • A • T • A • B • O • O • K KGL80 0.5µm 3.3V Gate Array Cell Library April 1997 V SAMSUNG SAMSUNG ASIC KGL80 0.5µm 3.3V Gate Array Cell Library Data Book  1997 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

PHL 625

Abstract: smd ra
Contextual Info: Philipe Semlconductors-Slgrvettc* Document No. 853-0380 ECN No. 97743 Dale of issue September 27,1089 Status Product Specification FAST Products FEATURES • High Impedanca NPN base inputs lor reduced loading 20^A In High and Low states • Octal bidirectional bus Interface

Micron Designline Vol 8

Abstract: DDR SDRAM designline DQSQ Micron NAND DQS dram ddr 1997 PC266 Micron DDR SDRAM designline 368-3945 ddr designline 1999 ddr designline 1998
Contextual Info: ○ SDR ○ DDR ○ /2N ○ PC100/ SDRAM DRAM ○ ○ 2 SDRAM CK 1 ○ ○ ○ SDR Single Data Rate ○ ○ ○ DDR Double Data Rate SDRAM DDR SDRAM ○ ○ ○ PC133 ○ DDR SDRAM ○ ○ ○ DRAM SDR SDR ○ 2 2 2) DDR SDRAM ○ 3 WRITE DDR 2N ○ READ

Hitachi DSA0087

Abstract: HD74ALVC1G66
Contextual Info: HD74ALVC1G66 Analog Switch ADE-205-625 Z Rev.0 July. 2001 Description The HD74ALVC1G66 has an analog switch in a 5 pin package. Switch section has its enable input control (C). High level voltage applied to C turns on the switch section. Applications include signal gating,

74LS691

Contextual Info: TOSHIBA TC74HC691AP/AF Synchronous Presettable 4-Bit Counter with Output Register Multiplexed 3-State Outputs TC74HC691 Binary, Asynchronous clear T heTC 74H C 691A is a high speed CMOS COUNTER/ REGISTER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

Hitachi DSA0076

Abstract: HD74HC1G66 HD74HC4066
Contextual Info: HD74HC1G66 Analog Switch ADE-205-314D Z 5th. Edition April 2001 Description The HD74HC1G66 is high speed CMOS analog switch using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed. The device has low ON resistance for good transfer

RXD TXD DTR DSR RS232

Abstract: EIA530 EIA530-A LTC1344A LTC1543 LTC1544 LTC1546 RS449 107 6K tantalum capacitors 107 6k 109 capacitor
Contextual Info: Final Electrical Specifications LTC1546 Software-Selectable Multiprotocol Transceiver with Termination December 1999 U FEATURES • ■ ■ ■ ■ ■ ■ DESCRIPTIO The LTC 1546 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with

Contextual Info: LTC1546 Software-Selectable Multiprotocol Transceiver with Termination FEATURES • ■ ■ ■ ■ ■ U ■ DESCRIPTIO The LTC 1546 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with the LTC1544, this chip set forms a complete softwareselectable DTE or DCE interface port that supports the

Hitachi DSA002789

Contextual Info: HD74HC4051 8-Channel Analog Multiplexer Demultiplexer Description This device connects together the outputs of 8 switches, thus achieving an 8 Channel Multiplexer. The binary code placed on the A, B, and C select lines determine which one of the eight switches in “on”,

unbalanced line driver receiver rs232

Abstract: EIA530 EIA530-A LTC2845 LTC2847 RS449 DB-25 connector
Contextual Info: LTC2847 Software-Selectable Multiprotocol Transceiver with Termination and 3.3V Digital Interface U FEATURES • ■ ■ ■ ■ ■ DESCRIPTIO The LTC 2847 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with

Contextual Info: LTC2847 Software-Selectable Multiprotocol Transceiver with Termination and 3.3V Digital Interface FEATURES • ■ ■ ■ ■ U ■ DESCRIPTIO The LTC 2847 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with

Hitachi DSA00276

Contextual Info: HD74UH4066 Analog Switch ADE-205-022A Z 2nd Edition August 1993 Description The HD74UH4066 is high speed CMOS analog switch using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed. The device has low ON resistance for good transfer

ttl 74191

Abstract: 74LS191M
Contextual Info: • ■ ■ SN54190, SN54191, SN54LS190, SN54LS191, SN74190, SN74191, SN74LS190, SN74LS191 SYNCHRONOUS UP/DOWN COUNTERS WITH DOWN/UP MODE CONTROL ■ D E C E M B E R 1 9 7 2 - R E V I S E D M A R C H 1 9 8 8

2068B

Contextual Info: 1.5 A DABLINGTON SWITCHES H igh-voltage, high-current Darlington arrays U L N 2 0 6 1 M through U L N 20 74B are designed for interface betw een low-level logic and a variety of peripheral loads such as relays, solenoids, dc and stepper motors, m agnetic print ham m ers, m ultiplexed.LED and incandescent

Hitachi DSA002789

Contextual Info: HD74HC4052/HD74HC4053 Dual 4-channel Analog Multiplexers/Demultiplexers/ Triple 2-channel Analog Multiplexers/Demultiplexers Description HD74HC4052: This device connects together the outputs of 4 switches in two sets, thus achieving a pair of 4 channel multiplexers. The binary code placed on the A, and B select lines determine which

Contextual Info: CDC112 MINE TO 9-LINE DIFFERENTIAL LVPECL CLOCK DRIVER SCAS322D - DECEM BER 1993 - REVISED APRIL 1996 FN PACKAGE TOP VIEW Low-Output Skew for Clock-Dlstrlbutlon and Clock-Generatlon Applications Differential Low-Voltage Pseudo ECL (LVPECL)-Compatlble Inputs and Outputs

Contextual Info: AM26S10C, AM26S11C QUADRUPLE BUS TRANSCEIVERS S L L S 1 1 6 B - JA NUARY 1977 - REVISED MAY 1995 • Schottky Circuitry for High Speed, Typical Propagation Delay Ti me. . . 12 ns d or n package t o p • Drivers Feature Open-Collector Outputs for Party-Line (Data Bus Operation

Contextual Info: MIC5818 32-Bit Serial-Input Latched Driver Preliminary Information General Description Features The MIC5818 is a 32-bit, serial-input, latched driver. Each high-voltage driver output features bipolar sourcing and DMOS sinking circuitry. • 3.3MHz guaranteed data input at V DD = 5V

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C 10E150 M C 100E150 • 800 ps Max. Propagation Delay • Extended 100E V gg Range o f - 4 .2 V to -5 .4 6 V • 75 k il Input Pulldow n Resistors The MC10E/100E150 contains six D-type latches w ith d iffe ren tial outputs. W hen

MC100EL35

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA JK Flip-Flop MC10EL35 MC100EL35 The MC10EL7100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of

MC100EL35

Contextual Info: bPE D MOTOROLA m SEMICONDUCTOR b3b?25E OG^SObö 73b IM0T4 MOTOROLA SC LOGIC 1 TECHNICAL DATA JK Flip-Flop MC10EL35 MC100EL35 The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is

MC100EL35

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA JK Flip-Flop MC10EL35 MC100EL35 The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of

uln2065bt

Abstract: ULN2065
Contextual Info: 2061 2069 i m il 1.5 A DARLINGTON SWITCHES High-voltage, high-current Darlington arrays ULN2061M through ULN2069B are designed for interface between low-level logic and a variety of peripheral loads such as relays, solenoids, dc and stepper motors, magnetic print hammers, multiplexed LED and incandescent