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    PEEL GATE ARRAY LOGIC Search Results

    PEEL GATE ARRAY LOGIC Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    EP910PI-30
    Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells PDF Buy
    EP1810LC-35-G
    Rochester Electronics LLC EP1810 - Classic Family EPLD, Logic, 900 Gates, 48 Macrocells, 35ns, Commercial PDF Buy
    EP610ILI-25
    Rochester Electronics LLC EP610 - Classic Family EPLD, Logic,300 Gates,16 Macrocells PDF Buy
    EP910LC-30
    Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells PDF Buy
    EP910PI-35
    Rochester Electronics LLC EP910 - Classic Family EPLD, Logic,450 Gates,24 Macrocells PDF Buy

    PEEL GATE ARRAY LOGIC Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    18CV8

    Contextual Info: -> GOULD CHIOSE*PLD Electrically ErasableProgrammableLogic PEEL 18CV8 Features • Synchronous preset, asynchronous clear • Independent output enables Advanced CMOS E2PROM Technology Application Versatility • Replace SSI/MSI logic • Emulates bipolar PAL™, GAL™ and the EPLDS


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    18cv8 PDF

    altera EP300

    Abstract: 18CV8 18cv8 programming altera ep 18cv8s 10391-D
    Contextual Info: GOULD SEMIC ONDU CTOR DIV 03E D | MDSSilti □□103S2 4055916 GOU LD S EM IC O N D U C T OR DIV -> GOULO Electronics 03E 10382 D CMOS e 2p l d Electrically Erasable Programmable Logic PEEL 18CV8 Features • Synchronous preset, asynchronous clear • Independent output enables


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    18CV8

    Abstract: 18CV825 18CV815 18cv8 programming 18CV8-15 HAS64 PEEL18CV8 AMI PEEL18CV8
    Contextual Info: AMI PEEL 18CV8 SEMICONDUCTORS February 1993 CMOS Programmable Electrically Erasable Logic Device General Description Features The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


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    18cv8peel18cv818cv82518cv815+418cv8 programming18cv8-15has64ami peel18cv8 PDF

    18CV8

    Abstract: 18CV8-15 18CV815 ami equivalent gates 18CV825 PEEL18CV8
    Contextual Info: PEEL 18CV8 AMI SEMICONDUCTORS February 1993 CMOS Programmable Electrically Erasable Logic Device Features General Description The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


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    18cv8peel18cv8480ki2480kd+418cv8-1518cv815ami equivalent gates18cv825 PDF

    18CV825

    Abstract: PEEL18CV8 AMI 18CV8 18cv8 programming ami equivalent gates ami equivalent gates of each core cell PEEL18CV8 18CV8-15
    Contextual Info: PEEL 18CV8 AMI SEMICONDUCTORS CMOS Programmable Electrically Erasable Logic Device February 1993 General Description Features The AMI PEEL18CV8 is a CMOS Programmable Electrically Erasable Logic device that provides a highperformance, low-power, reprogrammable,


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    18cv8peel18cv8464c2480kfi+7d01427318cv825peel18cv8 ami18cv8 programmingami equivalent gatesami equivalent gates of each core cell18cv8-15 PDF

    22CV10

    Abstract: 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 PEEL22LV10AZS-25 PEEL22LV10AZT-25
    Contextual Info: PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A) - 5 Volt tolerant inputs and I/O’s


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    22lv10az22cv1022cv10apal22v10+4peel22lv10azj-25peel22lv10azp-25peel22lv10azs-25peel22lv10azt-25 PDF

    PEEL18CV8P-15

    Abstract: PEEL18CV8S-7
    Contextual Info: Not recommended for New designs contact factory for availability PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array


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    18cv825mhzpeel18cv8p-15peel18cv8s-7 PDF

    PEEL18CV8P-15

    Abstract: PEEL18CV8J-10 PEEL18CV8P 18CV8 PEEL18CV8P-25L PEEL18CV PEEL18CV8J-25 PEEL18CV8JI-25 PEEL18CV8P-25 PEEL18CV8J-7
    Contextual Info: PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array - 10 inputs and 8 I/O pins - 12 possible macrocell configurations


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    18cv825mhzpeel18cv8p-15peel18cv8j-10+7peel18cv8ppeel18cv8p-25lpeel18cvpeel18cv8j-25peel18cv8ji-25peel18cv8p-25peel18cv8j-7 PDF

    ICT 18CV8Z

    Abstract: ICT PEEL18CV8ZP-25 18CV8Z-25 16V8 18CV8 PAL16V8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZJI-25
    Contextual Info: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


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    18cv8z-2520-pinpeel18cv8zj-25peel18cv8zs-25+9peel18cv8zt-25peel18cv8zpi-25peel18cv8zji-25ict 18cv8zict peel18cv8zp-2516v818cv8pal16v8peel18cv8zp-25 PDF

    PAL16V8

    Abstract: 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 18CV8Z-25
    Contextual Info: PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


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    18cv8z-2520-pinpeel18cv8zj-25peel18cv8zs-25+7peel18cv8zt-25peel18cv8zpi-25peel18cv8zji-25pal16v816v818cv8peel18cv8zp-25 PDF

    18CV8

    Abstract: PEEL18CV8J-7 PEEL18CV8P-7 PEEL18CV8S-7 PEEL18CV8P-10
    Contextual Info: PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 7ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available


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    18cv825mhz20-pinpeel18cv8j-7+3peel18cv8p-7peel18cv8s-7peel18cv8p-10 PDF

    18cv8z-25

    Abstract: PEELTM18CV8Z PEEL18CV8ZJI PEEL18CV8ZJI-25
    Contextual Info: Commercial PEEL 18CV8Z-25 CMOS Programmable Electrically Erasable Logic Device Features • Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz ■ CMOS Electrically Erasable Technology - Superior factory testing


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    18cv8z-25peel18cv8zp-25peel18cv8zj-25peel18cv8zs-25+8peel18cv8zt-25peel18cv8zpi-25peel18cv8zji-25peel18cv8zsi-25peel18cv8zti-2520-pinpeeltm18cv8zpeel18cv8zji PDF

    Contextual Info: Commercial PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


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    22lv10az22v10peel22lv10azp-25peel22lv10azj-25+4peel22lv10azs-25peel22lv10azt-2524-pin28-pin PDF

    22CV10

    Abstract: 22CV10A PAL22V10 PEEL22LV10AZJ-25 PEEL22LV10AZP-25 biomedical
    Contextual Info: PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


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    22lv10az22v10peel22lv10azp-2524-pin+8peel22lv10azj-2528-pinpeel22lv10azs-25peel22lv10azt-2522cv1022cv10apal22v10biomedical PDF

    Contextual Info: Commercial PEEL 18LV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


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    18lv8zpeel18lv8zp-25peel18lv8zj-25peel18lv8zs-25+3peel18lv8zt-2520-pinpeeltm18lv8z PDF

    PAL16V8

    Abstract: 18CV8Z PEEL18CV8ZJ-25
    Contextual Info: To Notfind recommended out if the package for New you designs need isavailable, contactcontact factoryCustomer for availability Service PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10%


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    18cv8zpal16v8peel18cv8zj-25 PDF

    18CV8

    Contextual Info: Not recommended for New designs contact factory for availability PEEL 18CV8 -7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features Architectural Flexibility - Enhanced architecture fits in more logic - 74 product terms x 36 input AND array


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    18cv825mhz PDF

    Contextual Info: To Notfind recommended out if the package for New you designs need isavailable, contactcontact factoryCustomer for availability Service PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation


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    22lv10az22v10 PDF

    Contextual Info: To find out if the package you need is available, contact Customer Service PEEL 22LV10AZ -25 CMOS Programmable Electrically Erasable Logic Device Features Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc = 5 µA typical at standby - Icc = 1.5 mA (typical) at 1 MHz


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    22lv10az PDF

    PAL16V8

    Abstract: 16V8 18CV8 PEEL18CV8ZJ-25 PEEL18CV8ZP-25 PEEL18CV8ZS-25 PEEL18CV8ZJ25 PEEL18CV8ZP-25L
    Contextual Info: PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz Architectural Flexibility - Enhanced architecture fits in more logic


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    18cv8zpal16v816v818cv8+5peel18cv8zj-25peel18cv8zp-25peel18cv8zs-25peel18cv8zj25peel18cv8zp-25l PDF

    pal16v8

    Abstract: dec mer PEEL18CV8ZP-25L
    Contextual Info: ic PEEL 18CV8Z -25 CMOS Programmable Electrically Erasable Logic Device Features Ultra Low Power Operation - Vcc = 5 Volts ±10% - Icc = 10 µA typical at standby - Icc = 2 mA (typical) at 1 MHz Architectural Flexibility - Enhanced architecture fits in more logic


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    18cv8zpro1-9600pal16v8dec mer+1peel18cv8zp-25l PDF

    22V10PLD

    Abstract: 74ls74 timing setup hold PA7Q24
    Contextual Info: PA7024 PEEL Array mimi SEMICONDUCTORS February 1993 Features General Description User-Configurable High Density Logic Array The PA7024 is a user-configurable high-density Programmable Electrically Erasable Logic PEEL Array for creating multi-level, l/O-buried, logic circuits. Designed


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    pa702424-pin28-pin22v10pld+274ls74 timing setup holdpa7q24 PDF

    ICT 18CV8

    Abstract: 18CV8 PEEL18CV8P-15 ICT 20 PIN PLASTIC 300 MIL DIP programmer EPLD 18cv8 programming free circuit eeprom programmer PEEL18CV PEEL18CV8J-5 PEEL18CV8P-7
    Contextual Info: Commercial/ Industrial PEEL 18CV8 -5/-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device Features • Multiple Speed Power, Temperature Options - VCC = 5 Volts ±10% - Speeds ranging from 5ns to 25 ns - Power as low as 37mA at 25MHz - Commercial and industrial versions available


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    18cv825mhz20-pinict 18cv8+8peel18cv8p-15ict 20 pin plastic 300 mil dipprogrammer epld18cv8 programmingfree circuit eeprom programmerpeel18cvpeel18cv8j-5peel18cv8p-7 PDF

    Contextual Info: Preliminary Commercial PEEL 22LV10AZ-25 CMOS Programmable Electrically Erasable Logic Device FEATURES • Low Voltage, Ultra Low Power Operation - Vcc = 2.7 to 3.6 V - Icc =25 uA typical at standby - Icc = 2 mA (typical) at 1 MHz - Meets JEDEC LV Interface Spec (JESD8-A)


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