PCORE Search Results

Contextual Info: Freescale Semiconductor Technical Data MSC7113 Rev. 7, 10/2005 MSC7113 Low-Cost DSP with DDR Controller and 10/100 Mbps Ethernet MAC DMA 32 ch JTAG Port JTAG ASM2 AMDMA 128 Boot ROM (8 KB) 64 to IPBus Instruction Cache (16 KB) Extended Core Interface AMIC

Contextual Info: Freescale Semiconductor Technical Data MSC7113 Rev. 9, 11/2006 MSC7113 Low-Cost DSP with DDR Controller and 10/100 Mbps Ethernet MAC DMA 32 ch JTAG Port JTAG ASM2 AMDMA 128 Boot ROM (8 KB) 64 to IPBus Instruction Cache (16 KB) Extended Core Interface AMIC

Contextual Info: Freescale Semiconductor Technical Data MSC7113 Rev. 6, 4/2005 MSC7113 Low-Cost DSP with DDR Controller and 10/100 Mbps Ethernet MAC DMA 32 ch JTAG Port JTAG ASM2 AMDMA 128 Boot ROM (8 KB) 64 to IPBus Instruction Cache (16 KB) Extended Core Interface AMIC

Contextual Info: Freescale Semiconductor Technical Data MSC7112 Rev. 6, 4/2005 MSC7112 Low-Cost DSP with DDR Controller DMA 32 ch JTAG Port JTAG ASM2 AMDMA 128 Boot ROM (8 KB) 64 to IPBus Instruction Cache (16 KB) Extended Core Interface AMIC 128 AMEC ASTH MUX Fetch Unit

Contextual Info: Freescale Semiconductor Technical Data MSC7115 Rev. 8, 12/2005 MSC7115 64 to IPBus 64 Fetch Unit Instruction Cache 16 KB AMIC 128 Extended Core 64 Interface AMEC External External Bus Memory 32 Interface from IPBus Multiplexer Trace Buffer (8 KB) 128 M2 SRAM

Contextual Info: Freescale Semiconductor Technical Data MSC7110 Rev. 7, 10/2005 MSC7110 Low-Cost DSP with DDR Controller JTAG Port JTAG AMDMA Boot ROM 8 KB 64 to IPBus 64 Fetch Unit Instruction Cache (16 KB) Extended Core Interface AMIC 128 AMEC 64 External Memory Interface

Contextual Info: LogiCORE IP AXI Interconnect v1.06.a DS768 December 18, 2012 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AXI Interconnect core connects one or more AXI memory-mapped master devices to one or more memory-mapped slave devices. The AXI

AMBA AXI4 verilog code

Abstract: ZYNQ-7000 BFM 20/ZYNQ-7000 BFM
Contextual Info: LogiCORE IP AXI Bus Functional Models v3.00.a DS824 July 25, 2012 Product Specification Introduction LogiCORE IP Facts Table The Xilinx LogiCORE IP AXI Bus Functional Models (BFMs), developed for Xilinx by Cadence Design Systems, support the simulation of

XC7K325T-ffg900

Abstract: XC7K325TFFG900 VX690T
Contextual Info: Vivado Design Suite User Guide Release Notes, Installation, and Licensing UG973 v2013.2 June 19, 2013 Notice of Disclaimer The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum

AN-1197

Abstract: LM2593HV AN1197
Contextual Info: ご注意：日本語のアプリケーション・ノートは参考資料として提供しており内容が 最新でない場合があります。製品のご使用に際しては、必ず最新の英文アプ リケーション・ノートをご確認ください。

asynchronous fifo vhdl xilinx

Abstract: vhdl synchronous bus SRL16 DS449 microblaze
Contextual Info: Fast Simplex Link FSL Bus (v2.11b) DS449 June 24, 2009 Product Specification Introduction LogiCORE Facts The FSL_V20 Fast Simplex Link (FSL) Bus is a uni-directional point-to-point communication channel bus used to perform fast communication between any

FB35-K52B-T710

Abstract: 115200-8-N-1 ML50x ML505 ML506 IR ML506 ChipScope ML506 JTAG DS202 ML507
Contextual Info: ML50x System Monitor Demonstration June 2008 Overview • • • • • Demonstration Goals System Monitor Overview Hardware Setup Software Setup Using The Demos Note: Presentation applies to all ML50x boards 2008 Xilinx, Inc. All Rights Reserved Goals

200-400kHz

Abstract: PA0423 48v transformer winding formula two switch forward converter PA0491 planar transformer formula transformer 100w PC500 48V-to-12V pcu 620
Contextual Info: HIGH FREQUENCY PLANAR TRANSFORMERS Spyglass Series up to 140W Power Rating: up to 140W Height: 8.6mm Max Footprint: 23.4mm x 20.1mm Max Frequency Range: 200kHz to 700kHz Electrical Specifications @ 25°C — Operating Temperature -40°C to 125°C Part Number

mathcad forward converter design

Abstract: TDK PC44 how to calculate ferrite core transformer mathcad flyback design tdk pc50 UCC3801 schematic TDK Ferrite Core PC44 general transformer design schematic diagram dc-dc flyback converter CURRENT TRANSFORMER
Contextual Info: A 50W, 48V-to-5V DC-DC Converter Using the HIP2100 Application Note April 1996 AN9605 Author: Greg J. Miller Introduction HIP2100 Half-Bridge Driver The most popular DC-DC converter topologies are also the simplest - the flyback converter and the forward converter.

50W TRANSFORMER

Abstract: transformer winding formula
Contextual Info: SMT 50W TRANSFORMER For use with Semtech's SC4905A/B Power Rating: 50W Height: 10.3 mm Max Footprint: 28.8 mm x 20.5 mm Max Electrical Specifications @ 25°C — Operating Temperature -40°C to 130°C Part Number Power Rating 1 Turns Ratio with 7T Pri. Aux.

Contextual Info: Freescale Semiconductor Data Sheet Document Number: MSC7118 Rev. 7, 4/2008 MSC7118 Low-Cost 16-bit DSP with DDR Controller • StarCore SC1400 DSP extended core with one SC1400 DSP core, 256 Kbyte of internal SRAM M1 memory, 16 way 16 Kbyte instruction cache ICache , four-entry write buffer, programmable

TCAM

Abstract: PowerPC 440GR nP3450 440GR TCAM Architecture
Contextual Info: PRODUC T BRIEF nP3454 4.4-Gbps Network Processor with Integrated Traffic Manager 4.4-Gbps Traffic Throughput • High-performance traffic manager and network processor integrated in one device • Standalone or integrated high-density line card solutions • Existing software libraries supporting

htc hd2 pinouts

Abstract: HTC HD2 a7w21 HTA Industries ABB Group dp 502 t MSC8102ADS SC140
Contextual Info: Technical Data Advance Information MSC8102/D Rev. 2, 4/2003 Quad Core 16-Bit Digital Signal Processor SC140 Extended Core SC140 Extended Core SC140 Extended Core MQBus SC140 Extended Core 128 SQBus 128 64 Boot ROM Local Bus IP Master The raw processing power of this highly

AT697

Abstract: AT697F AT697E 4426D ASR16
Contextual Info: Features • SPARC V8 High Performance Low-power 32-bit Architecture • • • • • • • • • • • • • • – LEON2-FT 1.0.13 compliant – 8 Register Windows Advanced Architecture: – On-chip Amba Bus – 5 Stage Pipeline – 16 kbyte Multi-sets Data Cache

MVME2700

Abstract: MVME1600 MVME2300 MVME2400 MPC603 MPC604 MPC750 MVME2400 SERIES MVME2600 MV270
Contextual Info: . . . . . CMI 125 West Park Loop Huntsville, AL 36806 Phone 256.722.0175 Fax 256.722.0144 Chandler/May, Inc. . . VxWorks Device Driver User’s Manual . . . . . . VxWorks Device Driver Software for the General Standards PMC-FLASH2 hosted on PowerPC and 80x86 Processors

34250

Abstract: IHLP-4040DZ-01 inductor wire toroid manufacturing
Contextual Info: VISHAY DALE Resistive Products Application Note Selecting IHLP Composite Inductors for Non-Isolated Converters Utilizing Vishay’s Application Sheet INTRODUCTION This application note will provide information to assist in the specification of IHLP composite inductors based on given

XC9500XL

Abstract: CS48 PC44 PQ208 TQ100 TQ144 XAPP114
Contextual Info: APPLICATION NOTE Understanding XC9500XL CPLD Power  XAPP114 January 22, 1999 Version 1.1 1* Application Note Summary The goal of this application note is to discuss XC9500XL CPLD power estimation and optimization and provide the reader with an understanding of sense-amplifier based CPLD power dissipation. A brief discussion of the process for estimation is

IEC55015

Abstract: tdg rm10 tp4 AN10876 TDG TP4 loss rm8 epcos transformer SSL1623 pot core epcos RM8 3f3 ferrite smps SSL1523 RM7 series bobbins
Contextual Info: AN10876 Buck converter for SSL applications Rev. 01 — 14 October 2009 Application note Document information Info Content Keywords Buck, down, converter, driver, topology, AC/DC, DC/DC, SMPS, LED Abstract This document describes how to design a buck converter that can, for

Xuint32

Abstract: IPIF XAPP967 ML403 X967 vhdl code for 4 channel dma controller
Contextual Info: Application Note: Embedded Processing Creating an OPB IPIF-based IP and Using it in EDK R XAPP967 v1.1 February 26, 2007 Abstract Author: Mounir Maaref Adding custom logic to an embedded design targeting the Xilinx FPGA can be achieved using different methods and techniques. This application note focuses on using the EDK OPB IPIF