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    PASIC 2 FPGA FAMILY Search Results

    PASIC 2 FPGA FAMILY Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    EP1800ILC-70
    		Rochester Electronics LLC EP1800 - Classic Family EPLD PDF Buy
    MD82289-8
    		Rochester Electronics LLC 82289 - Bus Arbiter for M80286 Processor Family PDF Buy
    EP1800GM-75/B
    		Rochester Electronics LLC EP1800 - Classic Family EPLD PDF Buy
    MG87C196KD-20/R
    		Rochester Electronics LLC 87C196KD - 16-bit Microcontroller, high performance, MCS-96 microcontroller family PDF Buy
    TN87C196KD
    		Rochester Electronics LLC 87C196KD - 16-bit Microcontroller, high performance, MCS-96 microcontroller family PDF Buy

    PASIC 2 FPGA FAMILY Datasheets (1)

    Part ECAD Model Manufacturer Description Datasheet Type PDF PDF Size Page count
    pASIC 2 FPGA FAMILY
    		Unknown Combining Speed, Density, Low Cost and Flexibility Original PDF 87.46KB 4

    PASIC 2 FPGA FAMILY Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    of the basic logic gates

    Abstract: pASIC 2 FPGA FAMILY QL2003
    Contextual Info: QL2003 3,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility ADVANCED DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 of the basic logic gates pASIC 2 FPGA FAMILY QL2003 PDF

    intel 4040

    Abstract: TQFP 144 PACKAGE 100-PIN 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C
    Contextual Info: QL2003 3,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIMINARY DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 intel 4040 TQFP 144 PACKAGE 100-PIN 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C PDF

    Contextual Info: QL2016 16,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility ADVANCED DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2016 PDF

    Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2009 PDF

    208CQFP

    Contextual Info: QL2007  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2007 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 208CQFP PDF

    84-PIN

    Abstract: PF144 PL84 PQ208 QL2007 QL2007-1PF144C QL2007-1PQ208C 208-Pin PQFP
    Contextual Info: QL2007  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2007 84-PIN PF144 PL84 PQ208 QL2007 QL2007-1PF144C QL2007-1PQ208C 208-Pin PQFP PDF

    PF144

    Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C
    Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2009 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C PDF

    Contextual Info: QL2003 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS 5 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    OCR Scan     		QL2003 -16-bit PDF

    Contextual Info: QL2020 20,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility ADVANCED DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2020 PDF

    Contextual Info: QL2012 12,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility ADVANCED DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2012 PDF

    456-PBGA

    Abstract: QL20091PB
    Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2009 -16-bit 144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 456-PBGA QL20091PB PDF

    100-PIN

    Abstract: 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C
    Contextual Info: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 100-PIN 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C PDF

    NC-206

    Abstract: 84-PIN PL84 PQ208 QL2005 QL2005-1PF144C QL2005-1PQ208C
    Contextual Info: QL2005  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. D pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2005 NC-206 84-PIN PL84 PQ208 QL2005 QL2005-1PF144C QL2005-1PQ208C PDF

    Contextual Info: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 PDF

    84-PIN

    Abstract: PL84 PQ208 QL2005 QL2005-1PF144C QL2005-1PQ208C vhdl code for flip-flop
    Contextual Info: QL2005 5,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIMINARY DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2005 PQ208 84-pin PF144 144-pin PQ208 208-pin PL84 QL2005 QL2005-1PF144C QL2005-1PQ208C vhdl code for flip-flop PDF

    PF144

    Abstract: PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C
    Contextual Info: QL2009 9,000 Gate pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility PRELIMINARY DATA pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2009 PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C PDF

    84-PIN

    Abstract: 84-PLCC
    Contextual Info: QL2005  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2005 -16-bit 144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 84-PIN 84-PLCC PDF

    100TQFP

    Abstract: 344RAM QL3040
    Contextual Info: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 -16-bit l144-TQFP QL24x32B 208-PQFP 208-CQFP 125oC MIL-STD-883 100TQFP 344RAM QL3040 PDF

    QL2005

    Abstract: QL2005-1PF144C QL2005-1PQ208C 84-PIN PL84 PQ208
    Contextual Info: QL2005  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2005 QL2005 QL2005-1PF144C QL2005-1PQ208C 84-PIN PL84 PQ208 PDF

    100-PIN

    Abstract: 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C quicklogic ql2003
    Contextual Info: QL2003  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. D pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2003 100-PIN 84-PIN PF100 PF144 PL84 QL2003 QL2003-1PF100C QL2003-1PF144C quicklogic ql2003 PDF

    Contextual Info: QL2009 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS S Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    OCR Scan     		QL2009 PDF

    Contextual Info: QL2007  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. E pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2007 PDF

    Contextual Info: QL2005 3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. C pASIC 2 HIGHLIGHTS 5 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    OCR Scan     		QL2005 PDF

    PCI i/o schematics

    Abstract: PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C
    Contextual Info: QL2009  3.3V and 5.0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev. D pASIC 2 HIGHLIGHTS Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance


    Original     		QL2009 PCI i/o schematics PF144 PQ208 QL2009 QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C PDF