PARAMETER11 Search Results

Contextual Info: BiCMOS StaticRAM 240K 16K x 15-BIT CACHE-TAG RAM For PowerPC and RISC Processors FEATURES: • 16K x 15 Configuration - 1 2 TAG Bits - 3 Separate I/O Status Bits (Valid, Dirty, Write Through) • Match output uses Valid bit to qualify MATCH output • High-Speed Address-to-Match comparison times

Contextual Info: bbE D INTEGRATE» DEVICE B 4ÔSS771 0015534 bMT « I D T CMOS SyncFlFO 256 X 18, 512 X 18,1024 x 18, 2048 x 18 and 4 096x18 ID T 7 2 2 0 5 L B ID T 7 2 2 1 5 L B ID T 7 2 2 2 5 L B ID T 7 2 2 3 5 L B ID T 7 2 2 4 5 L B Integrated Device Technology, Inc.

Contextual Info: HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM IDT7008S/L F eatu res * * * True Dual-Ported m em ory cells w hich allow sim ultaneous more u sin g the Master/Slave select when ca sca d in g more High-speed a c c e ss than one device_ - M ilitary: 25/35/55ns max.

M6SS

Contextual Info: bbE D INTEGRATE» DEVICE M6SS771 G01E37T Ti|b • IDT CMOS CacheRAM 32k x 9-BIT 288K-BIT BURST COUNTER & SELF-TIMED WRITE IDT71589SA FEATURES: DESCRIPTION: • • • • • • • The IDT71589 is a very high-speed 32k x 9-bit static RAM with full on-chip hardware support of the 80486 CPU interface.

Contextual Info: IDT7133SA/LA IDT7143SA/LA HIGH SPEED 2 K X 16 DUAL-PORT SRAM F e a tu re s ♦ High-speed access ♦ BUSY output flag on IDT7133; BUSY input on IDT7143 - M ilitary: 25/35/45/55/70/90ns max. ♦ Fully asynchronous operation from either port - Industrial: 55ns (max.)

49C466

Contextual Info: 64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT IDT49C466 IDT49C466A PRELIMINARY FEATURES: DESCRIPTION: • 64-bit wide Flow-thruEDC • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns

Contextual Info: PRELIMINARY IDT7MPV4160 IDT7MPV4161 IDT7MPV4162 IDT7MPV4162A IDT7MPV4163 64K/128K/256K/512K x 36 SYNCHRONOUS SRAM MODULE FAMILY FEATURES: DESCRIPTION: • Pin compatible flow-through synchronous SRAM module family • 144 position SO-DIMM Connector, - Berg part number: 61178

conventional bicmos

Contextual Info: 3ÔE D B 4Ô2S771 QQOÔ'iSa 3 Ö I D T _ - P - % - 2 3 - 6 3 INTEGRATED DEVICE HIGH-SPEED BiCMOS ECL STATIC RAM 4K 1Kx 4-BIT SRAM PRELIMINARY IDT10A474 IDT100A474 IDT101A474 FEATURES: DESCRIPTION: • 1024-words x 4-bit organization

Contextual Info: 256K x 9 CMOS STATIC RAM MODULE IDT7MB4040 Integrated Device Technology, Inc. FEATURES DESCRIPTION • High density separate I/O, 2 megabit 256K x 9 static RAM module • Low profile 44 pin, 600 mil DIP • Fast access time: 10ns (max.) • Surface mounted plastic SOJ packages on a multilayer

QD13

Contextual Info: I N T E GR AT ED DEVICE. 4 Û ES 77 1 00137=17 SÛ2 • IDT böE D CMOS SyncFlFO 256 X 18, 512 X 18, 1024 x 18, 2048 18 and 409 6 x 18 FEATURES: • • • • • 256 x 18-bit org a n iz a tio n array 7 2205LB 512 x 18-bit org a n iz a tio n array (7 2 2 1 5LB)

bbu07

Contextual Info: IDT6167SA IDT6167LA CMOS STATIC RAM 16K 16K x 1-BIT Integrated Device Technology, Inc. FEATURES: Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CSgoes HIGH, the circuit will automatically go to, and remain in, a standby

internal diagram of 7447 IC

Abstract: data sheet IC 7447 IC 7447 data sheet connecting diagram for ic 7447 DATASHEET OF IC 741 pin diagram of ic 741 TIM-LH-0-000-0 IC 7447 diagram circuit GPS.G3-X-03002 ic 7447
Contextual Info: !! ! ! ! ! ! TIM-LH SuperSense GPS Receiver Module u-blox AG Zürcherstrasse!68! 8800!Thalwil! Switzerland! www.u-blox.com! ! Phone!+41!1722!7444! Fax!+41!1722!7447! info@u-blox.com! ! ! ! ! ! ! ! ! Abstract This! document! describes! the! features! and! specifications! of! the

Contextual Info: fax id: 6140 CY7C375Ì :/ C Y P R E S S UltraLogic 128-Macrocell Flash CPLD Features • • • • Functional Description 128 macrocells in eight logic blocks 128 I/O pins 5 dedicated inputs including 4 clock pins In-System Reprogrammable ISR™ Flash technology

Contextual Info: 130.38 MHz Filter for CDMA Subscriber Applications Part Number 855326 S-Parameter Data Available Continued on follow ing page T y p ic a l / / / ' y 's P e r f o r m a n c t? \ \ \ ' V/ ’ V ’ V fV V Horizontal: 1 M H z / D iv Vertical: 1 0d B / D iv

6d40 engine diagram

Abstract: 27mhz remote control receiver ic rx 2b circuit FO HD64404BT sony g14 q2 colour tv receiver H669 Renesas C2L4 Delta Electronics dps 750 vba EQ7 SONY TVR 4621 sony g14 colour tv receiver
Contextual Info: To all our customers Information regarding change of names mentioned within this document, to Renesas Technology Corp. On April 1st 2003 the following semiconductor operations were transferred to Renesas Technology Corporation: operations covering microcomputer, logic,

20ra10z

Contextual Info: EEPLD M20RA10Z November 1989 PRELIMINARY DATA SHEET Features • CMOS EEPLD with Zero Standby Power: • 10 pA Typical, 150 pA Maximum ■ Quickly and Easily Reprogrammable in All Package Types ■ Operating Power Rises at Less Than 5 m A/MHz 100 Reprogramming Cycles, Minimum

Contextual Info: CMOS PARALLEL FIFO 64 x 4-BIT AND 64 x 5-BIT FEATURES: • • • • • • • • • • • • • • • • • IDT72401 IDT72402 IDT72403 IDT72404 O utput Enable QE pin. The FIFOs accept 4-bit or 5-bit data at the data input (Do-D3,4). The stored data stack up on a firstin/first-out basis.

Contextual Info: IDT72103 IDT72104 CMOS PARALLEL-SERIAL FIFO 2048 X 9, 4096 x 9 Integrated Device Technology, Inc. APPLICATIONS: FEATURES: • • • • • • • • • • • High-speed data acquisition systems Local area network LAN buffer High-speed modem data buffer

Contextual Info: PRELIMINARY IDT7MB4064 64K x 16 BiCMOS STATIC RAM MODULE Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • High density 1 megabit BiCMOS static RAM module • Multiple GND pins for maximum noise immunity The IDT7MB4064 is a 64K x 16 BiCMOS Static RAM

Contextual Info: CMOS STATIC RAM 1 MEG 256K x 4-BIT ADVANCE INFORMATION IDT71028 Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • 256K x 4 advanced high-speed CMOS static RAM • Equal access and cycle times — Military: 20/25ns — Commercial: 15/17ns • One Chip Select plus one Output Enable pin

ILI9340 driver

Abstract: ILI9340 DBI 6-16 B144 regulator yx 805
Contextual Info: ILI9340 a-Si TFT LCD Single Chip Driver 240RGBx320 Resolution and 262K color Specification Preliminary Version: V0.12 Document No.: ILI9340DS_V012.pdf ILI TECHNOLOGY CORP. 8F, No. 38, Taiyuan St., Jhubei City, Hsinchu Country 302 Taiwan R.O.C. Tel.886-3-5600099; Fax.886-3-5670585

ic 7447 pin configuration

Abstract: LEA-LA-0-000-0 7447 pin configuration connecting diagram for ic 7447 DATASHEET OF IC 741 uA 741 IC data sheet internal diagram of 7447 IC data sheet IC 7447 pin diagram of ic 741 741 IC data sheet
Contextual Info: !! ! ! ! ! ! LEA-LA GPS Receiver Module u-blox AG Zürcherstrasse!68! 8800!Thalwil! Switzerland! www.u-blox.com! ! Phone!+41!1722!7444! Fax!+41!1722!7447! info@u-blox.com! ! ! ! ! ! ! ! Abstract This! document! describes! the! features! and! specifications! of! the

Contextual Info: In teg rated D evice Technology, Inc. BiCMOS StaticRAM 240K 16Kx15-BIT CACHE-TAG RAM For PowerPC and RISC Processors FEATURES: • 16K x 15 Configuration - 1 2 TAG Bits - 3 Separate I/O Status Bits (Valid, Dirty, Write Through) • Match output uses Valid bit to qualify MATCH output

Contextual Info: HIGH-SPEED 64K x 8 DUAL-PORT STATIC RAM IDT7008S/L Features * * * True D ual-Ported m em ory c e lls w hich allow sim u ltan e o u s IDT7008 e a sily e x p a n d s data b u s width to 16 bits or reads of the s a m e m em ory location m ore u sin g the M aster/Slave select w hen c a s c a d in g m ore