PAC25 Search Results

PAC100/150TQ/T

Abstract: PAC250/201TQ/R rfi filter surface mount EMI/RFI T filter
Contextual Info: PACT CALIFORNIA MICRO DEVICES P/ACTIVE EMI/RFI T FILTER Pin Assignments Features • 8 Filter Channels in Miniature QSOP Package 1 GND GND 24 2 Filt1 Filt1 23 • Low In-Band Insertion Loss Maintains Signal Integrity 3 Filt2 Filt2 22 4 Filt3 Filt3 21 • Low Distortion Low Cross Talk

A2F060

Contextual Info: Revision 10 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

PRC201

Abstract: C10906 221tF
Contextual Info: PACTF CALIFORNIA MICRO DEVICES P/ACTIVE EMI/RFI TAPPED FILTER Features • 8 Filter Channels in Miniature QSOP Package • Ideal Frequency Response to Over 3 GHz • Low In-Band Insertion Loss Maintains Signal Integrity • Low Distortion Low Cross Talk • ESD Protected

OVM7690

Abstract: lis3dh STMPS2141STR L3G4200D STM32F2 MCBQVGA MCBSTM32F200 L3G4200 OV*7690 st802rt1a
Contextual Info: 3 4 PowerScale COPS NLPB3 PB3 A GND COP2 P2 PIP201 PIP202 PIP203 1 2 3 GND Power measurement B GND PIR601 COR6 R6 GND 2 PIIC202 RT 3 PIR602 PIIC203 PGD 10kPIIC204 4 SS COC27 C27 PIC2702 5 PIC222n 701 PIIC205 SGND CS 8 PIIC208 PIC1401 100nPIL201 COL2 L2 PID50C COD5

A2F500M3

Abstract: A2F500 A2F500 FG484 A2F200-FG484 A2F500 pin details A2F060 A2F060M A2F200M3 A2F200M3F-FG256 A2F200M3F
Contextual Info: Revision 9 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

PAP102

Abstract: LMH1983 PAC107 pic7801 PAC800 PAP101 PAC702 COC25 LP3878MR-ADJ pir320
Contextual Info: LMH1983 Evaluation Kit Users Guide LMH1983 Evaluation Kit Users Guide Version 1.0 2/4/10 Page 1 of 25 LMH1983 Evaluation Kit Users Guide INTRODUCTION The LMH1983 Evaluation Kit EVK allows for the evaluation of the LMH1983 3G/HD/SD Video Clock Generator with Audio Clock. The LMH1983 device is

PRC201

Abstract: band pass active filters marking 221 surface mount EMI/RFI T filter
Contextual Info: PACTF CALIFORNIA MICRO DEVICES P/ACTIVE EMI/RFI TAPPED FILTER Features • 8 Filter Channels in Miniature QSOP Package • Ideal Frequency Response to Over 3 GHz • Low In-Band Insertion Loss Maintains Signal Integrity • Low Distortion Low Cross Talk • ESD Protected

Contextual Info: VSC6134 Datasheet Features ● ● ● ● ● ● ● ● ● ● Two ITU-T G.709-compliant processors GR253-compliant STS192 section and line processor OTU synchronous and asynchronous mapping 10 GbE transport with RMON MIB per IEEE 802.3 ITU-T G.975 Reed Solomon encoder and decoder

1063MHz

Abstract: HP85047A 221T QSOP 24 PIN CALIFORNIA MICRO DEVICES
Contextual Info: PACT CALIFORNIA MICRO DEVICES P/ACTIVE EMI/RFI T FILTER Pin Assignments Features • 8 Filter Channels in Miniature QSOP Package 1 GND GND 24 2 Filt1 Filt1 23 • Low In-Band Insertion Loss Maintains Signal Integrity 3 Filt2 Filt2 22 4 Filt3 Filt3 21 • Low Distortion Low Cross Talk

A2F500

Abstract: a2f500 CS288 AES128 CS288 FG256 FG484 PQ208 A2F200M3F CORE8051 A2F200
Contextual Info: Revision 7 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

PAC300-2

Abstract: PAD703 PAC3201 PAR1501 PAJ1019 AU1042 AU1037 PAC3002 par3 PAD401
Contextual Info: COSO3 PASO201 COSO2 PASO301 COF1 COF2 PAF100 PAF200 PABJ301 COR28 COR29 COR30 COR31 COR24 COR25 COR26 COR27 PAU1204 PAU1205 PAR2402PAD604 PAD602 PAR2502 PAR2401PAD603 PAU1203PAU1202PAD601 PAU1201 PAR2501 PAU1304 PAU1305 PAR2601PAD704 PAR2701 PAD702 PAR2602PAD703

Contextual Info: Revision 0 Military Grade SmartFusion Customizable System-on-Chip cSoC Product Benefits • • 100% Military Temperature Tested and Qualified from –55°C to 125°C Not Susceptible to Neutron-Induced Configuration Loss Microcontroller Subsystem (MSS) •

A2F500 FG484

Abstract: A2F060
Contextual Info: Revision 12 SmartFusion Customizable System-on-Chip cSoC Microcontroller Subsystem (MSS) • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

Contextual Info: Revision 5 SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

Contextual Info: PAC T CALIFORNIA MICRO DEVICES P/ACTIVE EMI/RFI T FILTER Features • 8 Filter Channels in Miniature QSOP Package • Ideal Frequency Response to Over 3 GHz • Low In-Band Insertion Loss Maintains Signal Integrity • Low Distortion Low Cross Talk • ESD Protected

A2F500-FG484

Abstract: soc 1044 A2F060
Contextual Info: Revision 1 Military Grade SmartFusion Customizable System-on-Chip cSoC Product Benefits • • 100% Military Temperature Tested and Qualified from –55°C to 125°C Not Susceptible to Neutron-Induced Configuration Loss Microcontroller Subsystem (MSS) •

A2F200

Abstract: A2F200M3F A2F200M3F-FG256 A2F500 pin details A2F500 AES128 CS288 FG256 FG484 PQ208
Contextual Info: Revision 6 SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

pap103

Abstract: PAP101 PIR203 pap102
Contextual Info: LMH1983 Evaluation Kit Users Guide LMH1983 Evaluation Kit Users Guide Version 1.0 2/4/10 Page 1 of 25 LMH1983 Evaluation Kit Users Guide INTRODUCTION The LMH1983 Evaluation Kit EVK allows for the evaluation of the LMH1983 3G/HD/SD Video Clock Generator with Audio Clock. The LMH1983 device is

A2F200M3F-FG256

Abstract: A2F200M3F a2f50 b20 100 transister CS288 A2F060 A2F500 A2F200-FG484 transister di 505 AES128
Contextual Info: Revision 4 Actel’s SmartFusion Intelligent Mixed Signal FPGAs Microcontroller Subsystem MSS • • • • • • • • • • • • Hard 100 MHz 32-Bit ARM Cortex -M3 – 1.25 DMIPS/MHz Throughput from Zero Wait State Memory – Memory Protection Unit (MPU)

MHDR1X2

Abstract: COC15 PAR1501 HDR2X3, header
Contextual Info: 3 4 COR130 R130 PIR13001 PIC12802 PIC12801 RJ45 PIJ11701 COC128 C128 COL106 L106 1uF PIL10602 COL103 L103 PIL10301 COL104 L104 PIL10404 PIC130 2 COC130 C130 PIC13 02 COC131 C131 1 PIC131100nF 01 PIL10402 PIC13010uF PIC13 02 PIC13 01 PIC10301 + PIC10302 COR103