OF OPTICAL FPGAS Search Results

OF OPTICAL FPGAS Result Highlights (5)

Part	Manufacturer	Description	Download
SF-10GSFPPLCL-000	Amphenol Cables on Demand	Amphenol SF-10GSFPPLCL-000 SFP+ Optical Module - 10GBASE-SR (up to 300m/984') SFP+ Multimode Optical Transceiver Module (Duplex LC Connectors) - Cisco & HP Compatible	PDF
FO-9LPBMTRJ00-001	Amphenol Cables on Demand	Amphenol FO-9LPBMTRJ00-001 MT-RJ Connector Loopback Cable: Single-Mode 9/125 Fiber Optic Port Testing .1m	PDF
FO-62.5LPBLC0-001	Amphenol Cables on Demand	Amphenol FO-62.5LPBLC0-001 LC Connector Loopback Cable: Multimode 62.5/125 Fiber Optic Port Testing .1m	PDF
FO-50LPBMTRJ0-001	Amphenol Cables on Demand	Amphenol FO-50LPBMTRJ0-001 MT-RJ Connector Loopback Cable: Multimode 50/125 Fiber Optic Port Testing .1m	PDF
SF-SFPPLOOPBK-003.5	Amphenol Cables on Demand	Amphenol SF-SFPPLOOPBK-003.5 SFP+ Loopback Adapter Module for SFP+ Port Compliance Testing - 3.5dB Copper/Optical Cable Emulation	PDF

OF OPTICAL FPGAS Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
FLEX10K20 Contextual Info: SONET Interrupt Controller Introduction Overview SONET Synchronous Optical Network is a standard for transmission of data over optical fiber. The SONET format allows different types of formats to be transmitted over the same fiber optic line. The ispLSI 8840 is used in the port shelf section of the	Original	flex10k20rb240-4 flex10k20 1-800-lattice	PDF
flex 10k20 Abstract: FLEX10K20 Contextual Info: SONET Interrupt Controller Introduction Overview SONET Synchronous Optical Network is a standard for transmission of data over optical fiber. The SONET format allows different types of formats to be transmitted over the same fiber optic line. The ispLSI 8840 is used in the port shelf section of the	Original	flex10k20rb240-4 flex10k20 flex 10k20	PDF
flex10k20 Abstract: flex 10k20 an8034 Contextual Info: SONET Interrupt Controller Introduction Overview SONET Synchronous Optical Network is a standard for transmission of data over optical fiber. The SONET format allows different types of formats to be transmitted over the same fiber optic line. The ispLSI 8840 is used in the port shelf section of the	Original	flex10k20rb240-4 flex10k20 flex 10k20 an8034	PDF
an8034 Abstract: Lattice bidirectional Contextual Info: SONET Interrupt Controller Introduction Overview SONET Synchronous Optical Network is a standard for transmission of data over optical fiber. The SONET format allows different types of formats to be transmitted over the same fiber optic line. The ispMACH 51024VG is used in the port shelf section	Original	51024vg 1-800-lattice an8034 lattice bidirectional	PDF
design of scrambler and descrambler Abstract: XAPP651 vhdl code scrambler vhdl code for clock and data recovery Scrambler vhdl code for phase shift OC192 OC48 XAPP652 127-bit Contextual Info: Application Note: Virtex and Virtex-II Families R XAPP651 v1.1 November 15, 2002 SONET and OTN Scramblers/Descramblers Author: Nick Sawyer Summary This application note examines the design of scramblers for use with Synchronous Optical NETworks (SONET) and Optical Transport Unit (OTN) designs using the Virtex series of	Original	xapp651 design of scrambler and descrambler vhdl code scrambler vhdl code for clock and data recovery +6scrambler vhdl code for phase shift oc192 oc48 xapp652 127-bit	PDF
OC-768 Abstract: 84856M209 of optical fpgas xilinx virtex-II Contextual Info: SPIRENT COMMUNICATIONS SELECTS XILINX VIRTEX-II PLATFORM FPGAS . Page 1 of 2 FOR IMMEDIATE RELEASE SPIRENT COMMUNICATIONS SELECTS XILINX VIRTEX -II PLATFORM FPGAS FOR 40G OPTICAL TRANSPORT ANALYZER Most powerful Xilinx FPGAs provide competitive advantage	Original	oc-768 84856m209 \esp\ccstories\spirent0283 of optical fpgas +1xilinx virtex-ii	PDF
vhdl code for 8 bit barrel shifter Abstract: verilog code for barrel shifter vhdl code for 16 prbs generator vhdl code for loop filter of digital PLL ML523 vhdl code for 4 bit barrel shifter 8 bit barrel shifter vhdl code vhdl code for phase frequency detector verilog code of parallel prbs pattern generator prbs pattern generator using vhdl Contextual Info: Application Note: Virtex-5 FPGAs Dynamically Programmable DRU for High-Speed Serial I/O XAPP875 v1.1 January 13, 2010 Summary Author: Paolo Novellini and Giovanni Guasti Multi-service optical networks today require the availability of transceivers that can operate	Original	xapp875 vhdl code for 8 bit barrel shifter verilog code for barrel shifter vhdl code for 16 prbs generator +7vhdl code for loop filter of digital pll ml523 vhdl code for 4 bit barrel shifter 8 bit barrel shifter vhdl code vhdl code for phase frequency detector verilog code of parallel prbs pattern generator prbs pattern generator using vhdl	PDF
verilog code for barrel shifter Abstract: vhdl code for 8 bit barrel shifter vhdl code for 4 bit barrel shifter vhdl code Pseudorandom Streams Generator XAPP875 vhdl code for 16 prbs generator vhdl code for loop filter of digital PLL prbs generator using vhdl prbs pattern generator using vhdl vhdl code for clock and data recovery Contextual Info: Application Note: Virtex-5 FPGAs Dynamically Programmable DRU for High-Speed Serial I/O XAPP875 v1.0 March 9, 2009 Summary Author: Paolo Novellini and Giovanni Guasti Multi-service optical networks today require the availability of transceivers that can operate	Original	xapp875 verilog code for barrel shifter vhdl code for 8 bit barrel shifter vhdl code for 4 bit barrel shifter +6vhdl code pseudorandom streams generator vhdl code for 16 prbs generator vhdl code for loop filter of digital pll prbs generator using vhdl prbs pattern generator using vhdl vhdl code for clock and data recovery	PDF
DPS module Contextual Info: Applications Networking Virtex-II Platform FPGAs Support System Packet Interface Standards for Optical Networks The production release of SPI-4 Phase 2 cores to Xilinx communication customers worldwide, is a critical technology boost for multi-service, packet, and cell-based networking equipment.	Original	oc-192 10-channel dps module	PDF
tcam Abstract: ternary content addressable memory 100GbE Altera Stratix V datasheets of optical fpgas 100g phy interlaken network processor receiver ber fec 100G 40GBASE-R 10Gbase-kr transmitter Contextual Info: Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs WP-01128-1.1 White Paper As various standard bodies finalize their 100G standards for transport, Ethernet, and optical interfaces, FPGAs play a vital role for early adopters of technology who want	Original	100-gbe 28-nm wp-01128-1 40-gbe/100-gbe +10tcam ternary content addressable memory 100gbe altera stratix v datasheets of optical fpgas 100g phy interlaken network processor receiver ber fec 100g 40gbase-r 10gbase-kr transmitter	PDF
night-vision digital goggle Abstract: Cyclone camera link Altera Cyclone IV FP-5500 altera Date Code Formats Cyclone 2 Fairchild Imaging Altera Digital Camera Development Platform focal plane array defective pixel correction test block diagram of Video graphic array Contextual Info: Enabling Low-Power EO/IR System Development with FPGAs and Image- and Enabling Low-Power EO/IR System Development with FPGAs and Image- and Sensor-Processing IP WP-01129-1.0 White Paper Before embarking on the development of a next-generation electro-optical and infrared EO/IR	Original	wp-01129-1 fp-5500 night-vision digital goggle cyclone camera link +7altera cyclone iv altera date code formats cyclone 2 fairchild imaging altera digital camera development platform focal plane array defective pixel correction test block diagram of video graphic array	PDF
DESIGN AND IMPLEMENTATION 16-BIT BARREL SHIFTER Abstract: verilog code for barrel shifter kcpsm3 picoblaze kcpsm3 verilog code for 64 bit barrel shifter ML525 barrel shifter using verilog IMPLEMENTATION of 4-BIT LEFT SHIFT BARREL SHIFTER SFI-5 DS202 Contextual Info: Application Note: Virtex-5 FPGAs R SERDES Framer Interface Level 5 Author: Ralf Krueger XAPP871 v1.0 February 28, 2008 Summary This application note describes the implementation of SERDES Framer Interface Level 5 (SFI-5) in a Virtex-5 XC5VLX330T FPGA. SFI-5 is a standard defined by the Optical	Original	xapp871 xc5vlx330t design and implementation 16-bit barrel shifter verilog code for barrel shifter +8kcpsm3 picoblaze kcpsm3 verilog code for 64 bit barrel shifter ml525 barrel shifter using verilog implementation of 4-bit left shift barrel shifter sfi-5 ds202	PDF
free transistor equivalent book 2sc Abstract: uPA1556AH The Japanese Transistor Manual 1981 samsung UHF/VHF TV Tuner MOSFET cross-reference 2sk PD431000A-X upper arm digital sphygmomanometer circuit diagram PD72001 uPC1237 uPC 2002 Contextual Info: SEMICONDUCTORS SELECTION GUIDE Microcomputer 1 IC Memory 2 Semi-Custom IC 3 Particular Purpose 4 General Purpose Linear IC 5 Transistor/Diode/Thyristor 6 RF and Microwave Devices 7 Optical Device 8 Index 9 April 1999 The export of these products from Japan is regulated by the Japanese government. The export of some or all of	Original	x10679ejhv0sg00 free transistor equivalent book 2sc upa1556ah the japanese transistor manual 1981 +7samsung uhf/vhf tv tuner mosfet cross-reference 2sk pd431000a-x upper arm digital sphygmomanometer circuit diagram pd72001 upc1237 upc 2002	PDF
Contextual Info: Success Story XCITE VIPswitch Partners with Xilinx to Move Beyond ASICs Remotely programmable chips are a perfect fit for new line of Optical Terabit Routers. by Beverly Wilks Director, Marketing Communications, VIPswitch BWilks@VIPswitch.com offered the best price, reliability, and the	Original		PDF

10G Ethernet PHy Abstract: STM-64 infiniband Physical Medium Attachment 0C-48 LVPECL XGC1120 Contextual Info: New RocketPHY Transceiver Family Debuts at 10 Gbps A new family of 10 Gbps serial I/O transceivers dramatically cuts costs in light-speed applications. These transceivers make it possible to create unique optical connectivity designs. by Robert Bielby Senior Director, Strategic Solutions Marketing	Original	oc-192 10g ethernet phy stm-64 infiniband physical medium attachment +30c-48 lvpecl xgc1120	PDF
rtl8363 Abstract: rb60 bridge rectifier Contextual Info: Data Sheet May 2012 MAX24288 EV KIT Evaluates: MAX24288 General Description The MAX24288 EV Kit is an easy-to-use evaluation kit for the MAX24288 IEEE 1588 Packet Timestamper and Clock. On the network side of the MAX24288 an SFP module cage supports either a 1000BASE-X optical	Original	max24288 1000base-x 10/100/1000mbps rj-45 +2rtl8363 rb60 bridge rectifier	PDF
XC6VLX240T Abstract: XAPP882 verilog code of prbs pattern generator verilog code for 64 bit barrel shifter verilog code for 16 bit barrel shifter SFI-5 XC6V 4 bit barrel shifter using mux verilog code for barrel shifter DESIGN AND IMPLEMENTATION 16-BIT BARREL SHIFTER Contextual Info: Application Note: Virtex-6 Family SERDES Framer Interface Level 5 for Virtex-6 Devices Author: Vasu Devunuri XAPP882 v1.1 May 10, 2010 Summary This application note describes the implementation of SERDES Framer Interface Level 5 (SFI-5) [Ref 1] in a Virtex-6 XC6VLX240T FPGA. SFI-5 is a standard defined by the Optical	Original	xapp882 xc6vlx240t verilog code of prbs pattern generator verilog code for 64 bit barrel shifter +6verilog code for 16 bit barrel shifter sfi-5 xc6v 4 bit barrel shifter using mux verilog code for barrel shifter design and implementation 16-bit barrel shifter	PDF
Contextual Info: ML630 Virtex-6 HXT FPGA Optical Transmission Network Evaluation Board User Guide UG828 v1.0 September 28, 2011 The information disclosed to you hereunder (the "Materials") is provided solely for the selection and use of Xilinx products. To the maximum extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL	Original	ml630 ug828 om/products/boards-and-kits/ek-v6-ml630-g com/products/boards/ml630/reference	PDF
QSFP Abstract: MPLS over optical packet switching OTU1 PDH/SDH stm 4 muxponder ethernet over sdh QSFP 40G transceiver stm 16 muxponder STM-16 Architecture ethernet over pdh Contextual Info: Optical Transport Networks for 100G Implementation in FPGAs WP-01115-1.1 White Paper Based on announcements from vendors, enterprises and service providers, 100G system deployment is finally gaining real traction in the marketplace. The primary driver for this deployment is the customers’ ceaseless demand for higher bandwidth.	Original	wp-01115-1 ieee802 qsfp mpls over optical packet switching +8otu1 pdh/sdh stm 4 muxponder ethernet over sdh qsfp 40g transceiver stm 16 muxponder stm-16 architecture ethernet over pdh	PDF
interlaken Abstract: Altera Cyclone IV sfp design kit of optical fpgas 100G Development Kit Contextual Info: Stratix IV GT FPGA design resources for 100G applications Altera offers two design resources to help you evaluate Stratix IV GT FPGAs: a signal integrity development kit and a 100G demo board. Ideal for high-bandwidth 40G and 100G applications, Stratix IV GT FPGAs are the market’s lowest power high-density, high-performance FPGAs with	Original	10-gbps ss-01064-1 interlaken altera cyclone iv +3sfp design kit of optical fpgas 100g development kit	PDF
Altera Stratix V Abstract: 10G EPON EPON based VOIP by Cisco 10g EPON ONU EPON ONU 10g EPON olt Optical-Splitter MDU FTTH design 10G-EPON 10G-EPON ONU Contextual Info: Implementing Next-Generation Passive Optical Network Designs with FPGAs WP-01143-1.1 White Paper Passive optical network PON technology is emerging as the key access technology, as it has a scalable and cost-effective architecture to satisfy the ever-growing	Original	wp-01143-1 altera stratix v 10g epon epon based voip by cisco +710g epon onu epon onu 10g epon olt optical-splitter mdu ftth design 10g-epon 10g-epon onu	PDF
ROADM Abstract: Altera Stratix V muxponder 2.5G DWDm OC192 Contextual Info: White Paper Enabling 100-Gbit OTN Muxponder Solutions on 28-nm FPGAs The rapid growth in bandwidth required to support video and broadband wireless is straining communication networks. The current 10-Gbit OTN infrastructure is facing bandwidth exhaustion as the channels approach their	Original	100-gbit 28-nm 10-gbit 10-gbit-based +5roadm altera stratix v muxponder 2.5g dwdm oc192	PDF
pcie gen3 Abstract: 10GBASE-KR interlaken optical 400G CPRI multi rate 400G M20K 28Gbps 100g phy Stratix V Contextual Info: Stratix V FPGAs: Built for Bandwidth Meeting Bandwidth Demands Mobile video, audio/video streaming, cloud computing—these are just a few of the many applications driving up bandwidth demands for the underlying communications infrastructure. To be successful, your next-generation products	Original	28-nm gb-01009-3 pcie gen3 10gbase-kr +8interlaken optical 400g cpri multi rate 400g m20k 28gbps 100g phy stratix v	PDF
SFP LVDS Abstract: SFP LVDS altera SFP altera sgmii sgmii mode sfp SFP sgmii altera circuit diagram of PPM transmitter and receiver 8B10B fpga ethernet sgmii AN-518-1 Contextual Info: SGMII Interface Implementation Using Soft-CDR Mode of Stratix III Devices Application Note 518 May 2008, version 1.0 Introduction Stratix III device family are one of the most architecturally advanced, high performance, and low power FPGAs available in the market place.	Original	sfp lvds sfp lvds altera sfp altera sgmii +6sgmii mode sfp sfp sgmii altera circuit diagram of ppm transmitter and receiver 8b10b fpga ethernet sgmii an-518-1	PDF

OF OPTICAL FPGAS Search Results

OF OPTICAL FPGAS Result Highlights (5)

OF OPTICAL FPGAS Datasheets Context Search

FLEX10K20

flex 10k20

flex10k20

an8034

design of scrambler and descrambler

OC-768

vhdl code for 8 bit barrel shifter

verilog code for barrel shifter

DPS module

tcam

night-vision digital goggle

DESIGN AND IMPLEMENTATION 16-BIT BARREL SHIFTER

free transistor equivalent book 2sc

10G Ethernet PHy

rtl8363

XC6VLX240T

QSFP

interlaken

Altera Stratix V

ROADM

pcie gen3

SFP LVDS