O313 Search Results

dual-port RAM

Abstract: AT17 AT17LV010-10DP AT40K MQFPF256 IO358
Contextual Info: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM

CABGA

Abstract: fpga JTAG Programmer Schematics AT17 AT40K AT94K AT94S AT94S05AL AT94S10AL AT94S40AL C16107
Contextual Info: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System

gck451

Abstract: 2818C AT40K AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000 XC5200
Contextual Info: Features • Ultra High Performance • • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

Contextual Info: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System

QML-38535

Abstract: AT40KFL040 5962-0325002QXC o26f at40kfl040kz1sv
Contextual Info: REVISIONS LTR DESCRIPTION A B DATE YR-MO-DA APPROVED Added asynchronous timing waveform to figure 3. Updated boilerplate. ksr 04-07-04 Raymond Monnin Add device type 02 which is a 5 volt tolerant version. Editorial changes throughout. tcr 06-06-27 Raymond Monnin

74287

Abstract: ML9461B
Contextual Info: FEDL9461-01 Issue Date: Jan 29, 2009 ML9461B Segment Driver for Dot Matrix STN Liquid Crystal Display 1. Product Overview 1.1 General Description The ML9461B is a 320-output segment driver for driving a dot matrix LCD panel. The driver enables switching between 320 outputs and 240 outputs and 200 outputs. The ML9461B is used in

O318

Abstract: MN86372 MN863831EFS 40-stage o306 ilo3
Contextual Info: STN LCD Driver MN863831EFS 320-Output STN Segment Driver • Overview The MN863831EFS is a 320-output segment driver IC for dot matrix STN LCD panels. It latches 4-bit or 8-bit parallel data transferred from an LCD controller and generates the LCD drive signals.

TQFP-144 footprint

Abstract: AT40K AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000 XC5200 PQFP 352
Contextual Info: Features • Ultra High Performance • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

at40k20al-1bqu

Abstract: AT40K40AL-1BQU AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000 XC5200 AT40K
Contextual Info: Features • Ultra High Performance • • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

IO358

Abstract: AT17 AT17LV010-10DP AT40K MQFPF256 MQFP-256
Contextual Info: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM

PID code for avr

Abstract: scr28 ttl TEMPERATURE CONTROLLER with pid AVR SCR26 1138H fcx0 4201J AT40K atmel jtag ice studio 5 AT94K05AL
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR® Core, Extensive Data and Instruction SRAM and JTAG ICE

Contextual Info: Features • Functionally and Pin Compatible with the Atmel Rad Hard AT40KAL Series • Ultra High Performance • • • • • • • • • • • – System Speeds to 85 MHz – Array Multipliers > 45 MHz – 14 ns Flexible SRAM – Internal Tri-state Capability in Each Cell

Contextual Info: Features • Ultra High Performance • • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

077-148

Abstract: fmac16x16
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE

IO358

Abstract: IO149 AT17 AT17LV010-10DP AT40K MQFPF256 IO303 IO220 IO369
Contextual Info: Features • Functionally and Pin Compatible with the Atmel Commercial and Military AT40K Series • Ultra High Performance • • • • • • • • • • • • • • – System Speeds 60 MHz – Array Multipliers > 32 MHz – 18 ns Flexible SRAM

Contextual Info: 23456784539A6BCDEF7C699345674F976BCDEF7C6 A2C3 A2EC38 1 4C6C !"#$% 7C3969 2' 4C6C !"#$% 7C39F69(2' "C2#$36%436&6'234286544

Contextual Info: Features • Ultra High Performance • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

qml-38535

Abstract: AT40KEL040KZ1MQ
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 16 17 18 19 20 REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY Kenneth Rice STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE

R22-BH

Abstract: PID code for avr scr28 ttl SCR38 1138F AT94K preliminary fcx0 SCR51 TEMPERATURE CONTROLLER with pid AVR 4201J
Contextual Info: Features • Monolithic Field Programmable System Level Integrated Circuit FPSLIC • • • • • • • • • • • • • • • – AT40K SRAM-based FPGA with Embedded High-performance RISC AVR Core, Extensive Data and Instruction SRAM and JTAG ICE

O629

Abstract: O333 O436 O344 o627 O528 RCM4000 O448 O427 O439
Contextual Info: REVISION APPROVAL REVISION HISTORY Bottom Side Not Installed REV ECO A 000875 PROJECT APPROVAL DOCUMENTAPPROVAL CONTROL DATE ENGINEER DATE DESCRIPTION INITIAL RELEASE L.C All pads are in 0.100" leads spacing See PCB Layout for Details +5V UX1 UX5 UX2 CX1

4263B

Abstract: ATDH40D160M vhdl for 8 point fft AT17 AT40K AT40K20 AT40KAL AT40KAL040 ATDH40M ATDS2100PC
Contextual Info: Features • Functionally and Pin Compatible with the Atmel Rad Hard AT40KAL Series • Ultra High Performance • • • • • • • • • • • – System Speeds to 85 MHz – Array Multipliers > 45 MHz – 14 ns Flexible SRAM – Internal Tri-state Capability in Each Cell

AT17

Abstract: AT40K AT94K AT94S AT94S05AL AT94S10AL AT94S40AL
Contextual Info: Features • Multichip Module Containing Field Programmable System Level Integrated Circuit • • • • • • • • • • • • FPSLIC and Secure Configuration EEPROM Memory 512 Kbits to 1 Mbit of Configuration Memory with Security Protection and In-System

vhdl code for array multiplier using constant co efficient multiplier

Abstract: AT40K AT40K05AL AT40K10AL AT40K20AL AT40K40AL AT40KAL XC4000 XC5200
Contextual Info: Features • Ultra High Performance • • • • • • • • • – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Each Cell FreeRAM – Flexible, Single/Dual Port, Synchronous/Asynchronous 10 ns SRAM

RBS 2102

Abstract: fup 449 transistor DA3 307 DA 3807 transistor transistor DA3 309 RBS 2101 DA3 307 ic 3842 datasheet 120348 transistor da 3807
Contextual Info: PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT µPD161645 360 OUTPUT GATE DRIVER WITH POWER SUPPLY FOR TFT-LCD GATE DRIVER DESCRIPTION The µPD161645 is a TFT-LCD gate driver with power supply for TFT-LCD driver. Because this gate driver has a level shift circuit for logic input, it can output a high gate scanning voltage in response to a CMOS-level input.