NEC 100 PIN Search Results

ssqc 25

Contextual Info: JUPD431232L 32,768 x 32-Bit CMOS Synchronous Static RAM: W ith Burst Counter; 3.3-Volt Power NEC NEC Electronics Inc. Preliminary Information August 1994 Description Pin Configuration T h e ¿/PD431232L is a 3 2 ,7 6 8 -w o rd by 32 -b it sy n c h ro ­ 100-Pin TQFP

Contextual Info: NEC NEC Electronics Inc. Description The //PD42532 bidirectional data buffer features 32,768-word by 8 -bit organization and CM O S dynamic circuitry that provides for high-speed, asynchronous, simultaneous write and read operation at a minimum cycle time of 100 ns. Two sets of write and read

uPD7210

Abstract: gpib ic i72110 IEEE488 NEC uPD7210 PD7210 ines ieee488 GPIB interface
Contextual Info: Advance Information ine s Datasheet i72110 i72110 ine s µP to GPIB interface ASIC Features • Talker/Listener interface for instrumentation • • • • devices Microprocessor Bus Interface with 5.0 VIO NEC µPD7210 compatible register layout 100 pin TQFP package

32X64

Abstract: sdram dimm layout ZD512M58I U116M
Contextual Info: REVISIONS I. DESCRIPTION: REV Ÿ W9Q332647LB-222K is a 32Mx64 industry standard 168-pin PC-100-222 SDRAM DIMM Ÿ Manufactured with 16 16Mx8 NEC µPD45128841G5-A80 Synchronous DRAM devices Ÿ With serial presence detect EEPROM Ÿ Requires 3.3V+/-0.3V power supply

Contextual Info: DA TA SH EE T NEC MOS INTEGRATED CIRCUIT ¿¿PD4565421,4565821, 4565161 64M-BIT VIRTUAL CHANNEL SDRAM Description The 64M -bit Virtual Channel VC SDRAM is implemented to be 100% pin and package compatible to the industry standard SDRAM. It uses the same command protocol and interface as SDRAM. The VC SDRAM command set is a

Contextual Info: DATA SHEET NEC GaAs INTEGRATED CIRCUIT /iPG133G L-BAND SPDT SWITCH DESCRIPTION UPG133G is an L-BandSPDT Single Pole DoubleThrow GaAs FET switch which was developed fordigital cellular or cordless telephone application. The device can operate from 100 MHz to 2.5 GHz, having the low insertion loss.

NEC MEMORY

Contextual Info: PRELIMINARY DATA SHEET NEC / MOS INTEGRATED CIRCUIT ¿ ¿ P D 4 5 1 2 5 4 2 1 , 4 5 1 2 5 8 2 1 , 4 5 1 2 5 1 6 1 128M-BIT VIRTUAL CHANNEL SDRAM Description The 128M-bit Virtual Channel VC SDRAM is implemented to be 100% pin and package compatible to the industry

222k

Abstract: 079R PC-100 PC100-222 KO9018
Contextual Info: REVISION DATE REV DESCRPTION ZONE APPVD 6/26/01 III. TIMING I. DESCRIPTION: Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ Ÿ W9Q316727KD-222K is a 16Mx72 industry standard 168-pin PC100-222 SDRAM ECC DIMM Manufactured with 18 NEC ELPIDA 8Mx8 400-mil TSOPII-54 100 MHz Synchronous DRAM devices of 12-row, 9-column, 4 -bank addresing.

D4565821G5-A70-9J

Contextual Info: DA TA SH EE T NEC MOS INTEGRATED CIRCUIT 64M-BIT VIRTUAL CHANNEL SDRAM 64M-BIT VIRTUAL CHANNEL SDRAM Description The 64M -bit Virtual Channel VC SDRAM is im plem ented to be 100% pin and package compatible to the industry standard SDRAM. It uses the same command protocol and interface as SDRAM. The VC SDRAM command set is a

Germanischer Lloyd

Abstract: Class I Div 2 NEC Class 2 MiniLine SEMI F47 DS-ML50 transistor D442 Rittal box Metal oxide varistor 240v ac 50hz AC Input 100-240V DC Output 24V/08A L.P.S
Contextual Info: ML50.100, ML50.109 24V, 2.1A, SINGLE PHASE INPUT MiniLine POWER SUPPLY • ■ ■ ■ ■ ■ ■ ■ ■ ■ AC 100-240V Wide Range Input NEC Class 2 Compliant Adjustable Output Voltage Efficiency up to 89% Compact Design, Width only 45mm Full Output Power Between -10°C and +60°C

Contextual Info: DATA SHEET NEC GaAs INTEGRATED CIRCUIT /fPG132G L-BAND SPDT SWITCH DESCRIPTION /¿PG132G is an L-Band SPDT Single Pole D oubleThrow GaAs FET switch w hich w as developed for digital cellular or cordless telephone application. The device can operate from 100 MHz to 2.5 GHz, having the low insertion loss.

Contextual Info: DATA SHEET NEC GaAs INTEGRATED CIRCUIT /¿PG132G L-BAND SPDT SWITCH DESCRIPTION ¿¡PG132G is an L-Band SPDT Single Pole Double Throw GaAs FET switch w hich was developed for digital cellular or cordless telephone application. The device can operate from 100 MHz to 2.5 GHz, having the low insertion loss.

Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT ¿¿PD4 8 1 8 5 0 8M-bit Synchronous GRAM Description The ^PD481850 is a synchronous graphics memory SGRAM organized as 131,072 words x 32 bits x 2 banks random access port. This device can operate up to 100 MHz by using synchronous interface. Also, it has 8-column Block Write function

Contextual Info: DATA SHEET NEC GaAs INTEGRATED CIRCUIT Aî PG130G L-BAND SPDT SWITCH DESCRIPTION /xP G 130G isan L-B andS P D T Single P oleD oubleT hrow G aA sF E T switch w hich w as developed for digital cellular or cordless telephone application. The device can operate from 100 MHz to 2.5 GHz, having the low insertion loss.

nec k3

Contextual Info: DATA SHEET ESD NOISE CLIPPING DIODE NNCD6.8PL 5-PIN SUPER SMALL MINI MOLD FLAT LEAD TYPE ELECTROSTATIC DISCHARGE NOISE CLIPPING DIODE (QUAD TYPE: COMMON ANODE) DESCRIPTION PACKAGE DRAWING (Unit: mm) The NNCD6.8PL is a low capacitance type diode developed for ESD

nec k3

Contextual Info: DATA SHEET ESD NOISE CLIPPING DIODE NNCD6.8RL 5-PIN SUPER SMALL MINI MOLD FLAT LEAD TYPE ELECTROSTATIC DISCHARGE NOISE CLIPPING DIODE (QUAD TYPE: COMMON ANODE) DESCRIPTION PACKAGE DRAWING (Unit: mm) The NNCD6.8RL is a low capacitance type diode 1.6±0.1

IEC-61000-4-2

Abstract: NNCD10J NNCD16J NNCD36J DIODE 6j
Contextual Info: DATA SHEET ESD NOISE CLIPPING DIODE NNCD5.6J to NNCD36J ELECTROSTATIC DISCHARGE NOISE CLIPPING DIODE 2-PIN ULTRA SUPER MINI MOLD FLAT TYPE These products are a diode developed for ESD (Electrostatic 1.4 ± 0.1 Discharge) absorption. Based on the IEC-61000-4-2 test on

nec photocoupler

Abstract: NEC ps2911 pc 100 nec nec 2503
Contextual Info: PRELIMINARY DATA SHEET PHOTOCOUPLER PS2911-1 HIGH CTR, 4-PIN ULTRA SMALL PACKAGE FLAT-LEAD PHOTOCOUPLER −NEPOC TM Series− DESCRIPTION The PS2911-1 is an optically coupled isolator containing a GaAs light emitting diode and an NPN silicon phototransistor in one package for high density mounting applications.

MARKING KL

Abstract: 2SC5436
Contextual Info: DATA SHEET NPN SILICON RF TWIN TRANSISTOR µPA828TD NPN SILICON RF TRANSISTOR WITH 2 ELEMENTS IN A 6-PIN LEAD-LESS MINIMOLD (M16, 1208 PACKAGE) FEATURES • Built-in low phase distortion transistor suited for OSC applications fT = 9.0 GHz TYP., S21e2 = 7.5 dB TYP. @ VCE = 1 V, IC = 10 mA, f = 2 GHz

date code marking NEC

Abstract: NEC TRANSISTOR MARKING CODE code marking NEC M33 marking NEC MARKING CODE NE685M33-T3 NE685M33 M33 TRANSISTOR
Contextual Info: DATA SHEET NPN SILICON RF TRANSISTOR NE685M33 NPN SILICON RF TRANSISTOR FOR HIGH-FREQUENCY LOW NOISE 3-PIN SUPER LEAD-LESS MINIMOLD M33 FEATURES • Low noise NF = 1.5 dB TYP. @ VCE = 3 V, IC = 3 mA, f = 2 GHz 2 • S21e = 11 dB TYP. @ VCE = 3 V, IC = 10 mA, f = 2 GHz

upd449c

Abstract: UPD449G-15 rain
Contextual Info: - 58 16 K m % a £ ÍSAtiSS CC CMOS S t a t i c R A M 2 0 4 8 x 8) x A ••/ + y / ft TAAC nax (ns) TCAC max (ns) TOE max (ns) M TOH sin (ns) TOD nax (ns) TIP rain (ns) TDS min (ns) TDH min (ns) TWO ain (ns) Ti» max (ns) V D D or V C C (V) 24 PIN M I DD

IEC-61000-4-2

Contextual Info: DATA SHEET ESD NOISE CLIPPING DIODE NNCD6.8PG LOW CAPACITANCE TYPE ELECTROSTATIC DISCHARGE NOISE CLIPPING DIODE QUARTO TYPE: COMMON ANODE 5-PIN MINI MOLD PACKAGE DIMENSION (Unit: mm) The NNCD6.8PG is a diode developed for ESD (Electrostatic 2.8 ± 0.2 +0.1

M33 TRANSISTOR

Abstract: NEC TRANSISTOR MARKING CODE NE687M33 NE687M33-T3
Contextual Info: DATA SHEET NPN SILICON RF TRANSISTOR NE687M33 NPN SILICON RF TRANSISTOR FOR HIGH-FREQUENCY LOW NOISE 3-PIN SUPER LEAD-LESS MINIMOLD M33 FEATURES • Low noise NF = 1.5 dB TYP. @ VCE = 1 V, IC = 3 mA, f = 2 GHz • 3-pin super lead-less minimold (M33) package

Contextual Info: DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2502 N-CHANNEL MOS FIELD EFFECT TRANSISTOR FOR SWITCHING DESCRIPTION 1 2 3 4 3 ±0.1 0.10 S 5.8 ±0.1 6.4 ±0.1 0.17 ±0.05 spreader. The land size is same as 8-pin TSSOP. 8 7 6 5 0.10 M • µ PA2502 has a thin surface mount package with a heat