MB 300 IS Search Results

transistor D400 pin diagram

Abstract: CON501 transistor D400 pin diagram application INAP125T24 d400 transistor CON502 CON500 MB91V460 transistor D400 circuit diagram application transistor D400
Contextual Info: Fujitsu Microelectronics Europe User Guide FMEMCU-UG-910069-13 FR60 FAMILY ADAPTER BOARD EMA-MB91V460A-300 USER GUIDE EMA-MB91V460A-300 Revision History Revision History Date 17.12.2007 23.01.2008 29.01.2008 18.03.2008 25.03.2008 13.10.2008 Issue V1.00, RH/AW/MB, First Release

CY7C1392V18

Abstract: CY7C1393V18 CY7C1394V18
Contextual Info: 392V18 CY7C1392V18 CY7C1393V18 CY7C1394V18 ADVANCE INFORMATION 18-Mb SRAM with DDR-II SIO Architecture Features Functional Description • 18-Mb Density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth

Contextual Info: KBPC MB 15005 1505 THRU KBPC MB 1510 1510 RECTIFIER SPECIALISTS TECHNICAL SPECIFICATIONS OF SINGLE-PHASE SILICON BRIDGE RECTIFIER VOLTAGE RANGE - 50 to 1000 Volts CURRENT - 15 Amperes FEATURES * Metal case for Maximum Heat Dissipation * Surge overload ratings-300 Amperes

Contextual Info: KBPC MB 15005W 1505W THRU KBPC MB 1510W 1510W RECTIFIER SPECIALISTS TECHNICAL SPECIFICATIONS OF SINGLE-PHASE SILICON BRIDGE RECTIFIER VOLTAGE RANGE - 50 to 1000 Volts CURRENT - 15 Amperes FEATURES * Metal case for Maximum Heat Dissipation * Surge overload ratings-300 Amperes

CY7C1317V18

Abstract: CY7C1319V18 CY7C1321V18
Contextual Info: CY7C1317V18 CY7C1319V18 CY7C1321V18 ADVANCE INFORMATION 18-Mb 4-Word Burst SRAM with DDR-II Architecture Features Functional Description • 18-Mb Density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth

Express 300

Abstract: MegaRAID Express 100
Contextual Info: MegaRAID Express 300 RAID Adapter FEATURES • One Ultra2 LVD/SE SCSI channel • PCI 2.2 compliant • One DIMM socket with 32 MB ECC SDRAM expandable to 128 MB • Standard NT clustering support • Advanced management and configuration utilities ®

CY7C1316V18

Abstract: CY7C1318V18 CY7C1320V18
Contextual Info: 316V18 CY7C1316V18 CY7C1318V18 CY7C1320V18 ADVANCE INFORMATION 18-Mb 2-Word Burst SRAM with DDR-II Architecture Features Functional Description • 18-Mb Density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth

GS9004A

Abstract: GS9004ACKB
Contextual Info: GENLINX GS9004A Serial Digital Cable Equalizer DATA SHEET DEVICE DESCRIPTION FEATURES • automatic cable equalization • typically greater than 300 m of high quality cable at 270 Mb/s • fully compatible with SMPTE 259M and operational to 400 Mb/s The Gennum GS9004A is a monolithic automatic cable

CY7C1322V25

Abstract: CY7C1397V25
Contextual Info: 397V25 CY7C1397V25 CY7C1322V25 ADVANCE INFORMATION 18-Mb 2-Word Burst SRAM with DDR-I Architecture Features Functional Description • 18-Mb Density 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth • 2-Word Burst for reducing address bus frequency

Contextual Info: GENNUM G E N L I N X * GS9004C Serial Digital Cable Equalizer PRELIMINARY DATA SHEET DEVICE DESCRIPTION • automatic cable equalization • typically greater than 350 m of high quality cable at 270 Mb/s • typically 300 m of high quality cable at 360 Mb/s

Contextual Info: POWER DIVIDERS = 0°: 2-WAY ISO LA TIO N dB FR E Q U E N C Y RANGE IN S E R T IO N LOSS ; (dB ) LB TYP/MAX MB TYP/MAX P H A S E U N B A LA N C E (D eg re es ) LB MB UB MAX MAX MAX (M H z) LB TYP/MIN MB TYP/MIN UB TYP/MIN UB TYP/MAX 0.01-100 0.25-300

CY7C1323V25

Abstract: CY7C1398V25
Contextual Info: 398V25 CY7C1398V25 CY7C1323V25 ADVANCE INFORMATION 18-Mb 4-Word Burst SRAM with DDR-I Architecture Features Functional Description • 18-Mb Density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 300-MHz Clock for High Bandwidth • 4-Word Burst for reducing address bus frequency

Contextual Info: POWER DIVIDERS 0° : 5-WAY FREQUENCY RANGE MHz 0.05-30 1-300 ISOLATION (dB) LB TYP/MIN MB TYP/MIN UB TYP/MIN 28/20 25/20 30/25 23/18 25/20 20/17 INSERTION LOSS (dB) LB TYP/MAX 0.4/0.8 0.2/0.5 MB TYP/MAX 0.3/0.7 0.6/1.0 UB TYP/MAX 0.6/1.0 1.5/2.0 AMPLITUDE UNBALANCE

LB 124 transistor

Abstract: conn female 300 pins DEK-701 DEP-901 DES-901
Contextual Info: POWER DIVIDERS 0º : 5-WAY SURFACE MOUNT FREQUENCY RANGE MHz 0.05-30 1-300 ISOLATION (dB) LB TYP/MIN MB TYP/MIN UB TYP/MIN 28/20 25/20 30/25 23/18 25/20 20/17 INSERTION LOSS (dB) LB TYP/MAX MB TYP/MAX UB TYP/MAX 0.4/0.8 0.3/0.7 0.6/1.0 0.2/0.5 0.6/1.0 1.5/2.0

Contextual Info: DS92LV1023E www.ti.com SNLS187B – MARCH 2005 – REVISED APRIL 2013 DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer Check for Samples: DS92LV1023E FEATURES DESCRIPTION • The DS92LV1023E is a 300 to 660 Mb/s serializer for high-speed unidirectional serial data transmission

Contextual Info: DS92LV1023E www.ti.com SNLS187B – MARCH 2005 – REVISED APRIL 2013 DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer Check for Samples: DS92LV1023E FEATURES DESCRIPTION • The DS92LV1023E is a 300 to 660 Mb/s serializer for high-speed unidirectional serial data transmission

Contextual Info: DS92LV1224 www.ti.com SNLS189A – APRIL 2005 – REVISED APRIL 2013 DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer Check for Samples: DS92LV1224 FEATURES DESCRIPTION • The DS92LV1224 is a 300 to 660 Mb/s deserializer for high-speed unidirectional serial data transmission

Contextual Info: DS92LV1224 www.ti.com SNLS189A – APRIL 2005 – REVISED APRIL 2013 DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer Check for Samples: DS92LV1224 FEATURES DESCRIPTION • The DS92LV1224 is a 300 to 660 Mb/s deserializer for high-speed unidirectional serial data transmission

Contextual Info: DS92LV1023E DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer Literature Number: SNLS187A DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer General Description Features The DS92LV1023E is a 300 to 660 Mb/s serializer for highspeed unidirectional serial data transmission over FR-4

Contextual Info: POWER DIVIDERS 0° : 5-WAY S u rfa c e M FREQUENCY RANGE SOLATION (dB LB (MHz) 0.05-30 1-300 ount t y p /m in typ / min MB UB TYP/MIN 28/20 25/20 30/25 23/18 25/20 20/17 INSERTION LOSS (dB) LB TYP/MAX 0.4/0.8 0.2/0.5 MB TYP/MAX 0.3/0.7 0.6/1.0 UB TYP/MAX

Contextual Info: DS92LV1224 DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer Literature Number: SNLS189 DS92LV1224 30-66 MHz 10 Bit Bus LVDS Deserializer General Description Features The DS92LV1224 is a 300 to 660 Mb/s deserializer for high-speed unidirectional serial data transmission over FR-4

CY7C13X

Abstract: CY7C1311V18 CY7C1313V18 CY7C1315V18 BB165 CY7C1313
Contextual Info: 311V18 CY7C1311V18 CY7C1313V18 CY7C1315V18 ADVANCE INFORMATION 18-Mb 4-Word Burst SRAM with QDR -II ArchitecFeatures Functional Description • Separate Independent Read and Write Data Ports — Supports concurrent transactions • 300-MHz Clock for High Bandwidth

DS92LV1023E

Abstract: DS92LV1023EMQ DS92LV1224 MSA28
Contextual Info: DS92LV1023E 30-66 MHz 10 Bit Bus LVDS Serializer General Description Features The DS92LV1023E is a 300 to 660 Mb/s serializer for highspeed unidirectional serial data transmission over FR-4 printed circuit board backplanes and balanced copper cables. It transforms a 10-bit wide parallel LVCMOS/LVTTL

GS9000S

Abstract: single chip converter for ntsc to sdi ic A-302 GS9000 GS9000B GS9000SCPJ GS9000SCTJ GS9005A GS9010A GS9015A
Contextual Info: GENLINX GS9000S Serial Digital Decoder DATA SHEET DEVICE DESCRIPTION • fully compatible with SMPTE 259M • decodes 8 and 10 bit serial digital signals for data rates to 300 Mb/s The GS9000S is a CMOS integrated circuit specifically designed to deserialize SMPTE 259M serial digital signals