MB 10F Search Results

transistor c124 esn

Abstract: transistor SA235 S71NS064NA0
Contextual Info: S71NS128NA0/S71NS064NA0 Based MCPs Stacked Multi-Chip Product MCP MirrorBit Flash Memory and PSRAM 128 Mb (8M x 16-bit) and 64 Mb (4M x 16-Bit), 110 nm CMOS 1.8 Volt-only, Multiplexed, Simultaneous Read/ Write, Burst Mode Flash Memory with 16 Mb (1M x 16-Bit) PSRAM

ZL50012QCG1

Abstract: MS-026 ZL50012 STO10
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features • April 2006 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

MS-026

Abstract: ZL50012
Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2004 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

BC1211

Contextual Info: ZL50012 Flexible 512-ch Digital Switch Data Sheet Features July 2005 • 512 channel x 512 channel non-blocking switch at 2.048 Mb/s, 4.096 Mb/s or 8.192 Mb/s operation • Rate conversion between the ST-BUS inputs and ST-BUS outputs • Per-stream ST-BUS input with data rate selection

Contextual Info: PROGRAMMABLE FU JITSU SCHOTTK Y 16384-BIT MB 7134E-W READ ONLY MEMORY November 1985 Edition 1.0 SCHOTTKY 16384-BIT DEAP PROM 4096 WORDS x 4 BITS This Fujitsu MB 7T34-W is high speed Schottky TT L electrically field pro­ grammable read only memory organized as 4096 words by 4 bits. With threestate outpus on the MB 7134-W, memory expansion is simple.

DS21291C

Abstract: rxbf
Contextual Info: MCP2510 Stand-Alone CAN Controller with SPI Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

DS30000

Abstract: ID10 MCP2510
Contextual Info: MCP2510 Stand-Alone CAN Controller with SPI Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

ID10

Abstract: MCP2510 DS30000 B-701
Contextual Info: MCP2510 Stand-Alone CAN Controller with SPI Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

Contextual Info: CY7C1316V18 CY7C1318V18 CY7C1320V18 PRELIMINARY 18-Mb DDR -II SRAM 2-Word Burst Architecture Features Functional Description • 18-Mb density 2M x 8, 1M x 18, 512K x 36 • 250-MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency

Contextual Info: M MCP2510 Stand-Alone CAN Controller with SPIΤΜ Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

Contextual Info: M MCP2510 Stand-Alone CAN Controller with SPIΤΜ Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

Contextual Info: CY7C1317V18 CY7C1319V18 CY7C1321V18 PRELIMINARY 18-Mb DDR -II SRAM 4-Word Burst Architecture Features Functional Description • 18-Mb density 2M x 8, 1M x 18, 512K x 36 • 250-MHz clock for high bandwidth • 4-Word burst for reducing address bus frequency

CY7C1317V18

Abstract: CY7C1319V18 CY7C1321V18
Contextual Info: CY7C1317V18 CY7C1319V18 CY7C1321V18 PRELIMINARY 18-Mb DDR-II SRAM Four-word Burst Architecture Features Functional Description • 18-Mb density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 250-MHz clock for high bandwidth • Four-word burst for reducing address bus frequency

Contextual Info: PRELIMINARY CY7C1323V25 18-Mb 4-Word Burst SRAM with DDR -I Architecture Features Functional Description • 18 Mb Density 512Kb x 36 • 167 MHz Clock for High Bandwidth • 4-Word Burst for reducing address bus frequency • Double Data Rate (DDR) interfaces (data transferred at

Contextual Info: FUJITSU MICROELECTRONICS T73> .D 374T7bS 0005121 T • T-75-37-05 F U JIT SU April 1987 Edition 1.0 SERIAL INTERFACE ADAPTER FOR DSP SIA The Fujitsu MB 87069 Is a dedloated Serial Interface Adapter (SIA) that provides cost-effeotlve Interface support between the Fujitsu MB 8764

56-PIN

Abstract: LH28F320S3TD-L10 TSOP056-P-1420
Contextual Info: LH28F320S3TD-L10 LH28F320S3TD-L10 32 M-bit 2 MB x 8/1 MB x 16 x 2-Bank Smart 3 Dual Work Flash Memory DESCRIPTION The LH28F320S3TD-L10 Dual Work flash memory with Smart 3 technology is a high-density, low-cost, nonvolatile, read/write storage solution for a wide

CY7C1392V18

Abstract: CY7C1393V18 CY7C1394V18 159m4
Contextual Info: CY7C1392V18 CY7C1393V18 CY7C1394V18 PRELIMINARY 18-Mb DDR-II SIO SRAM Two-word Burst Architecture Features Functional Description • 18-Mb density 2M x 8, 1M x 18, 512K x 36 — Supports concurrent transactions • 250-MHz clock for high bandwidth • Two-word burst for reducing address bus frequency

gsm internet modem circuit

Abstract: S3H-L TSOP056-P-1420
Contextual Info: LH28F160S3-L/S3H-L LH28F160S3-L/S3H-L 16 M-bit 2 MB x 8/1 MB x 16 Smart 3 Flash Memories (Fast Programming) DESCRIPTION The LH28F16S3-L/S3H-L flash memories with Smart 3 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide

TSOP056-P-1420

Abstract: LH28F160S5X-L70 LH28F160S5H-L70 LH28F160S5-L LH28F160S5-L70
Contextual Info: LH28F160S5-L/S5H-L LH28F160S5-L/S5H-L 16 M-bit 2 MB x 8/1 MB x 16 Smart 5 Flash Memories (Fast Programming) DESCRIPTION The LH28F160S5-L/S5H-L flash memories with Smart 5 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide

CSP-64

Abstract: TSOP056-P-1420 LH28F160S5H-L70 LH28F160S5-L LH28F160S5-L70
Contextual Info: LH28F160S5-L/S5H-L LH28F160S5-L/S5H-L 16 M-bit 2 MB x 8/1 MB x 16 Smart 5 Flash Memories (Fast Programming) DESCRIPTION The LH28F160S5-L/S5H-L flash memories with Smart 5 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide

Contextual Info: 28F016SV • SmartVoltage Technology — User-Selectable 3.3V or 5V Vcc — User-Selectable 5V or 12V VPP ■ 65 ns Access Time ■ 1 Million Erase Cycles per Block ■ 30.8 MB/sec Burst Write Transfer Rate ■ 0.48 MB/sec Sustainable Write Transfer Rate ■ Configurable x8 or x16 Operation

A12E1

Abstract: 11DQ3 LH28F160S5H-L70 LH28F160S5-L LH28F160S5-L70 TSOP056-P-1420 11DQ5
Contextual Info: SHARP LH28F160S5-L/S5H-L LH28F160S5-L7S5H-L 16 M-bit 2 MB x 8/1 MB x 16 Smart 5 Flash Memories (Fast Programming) DESCRIPTION • High performance read access time The LH 28F160S 5-L/S5H -L flash m em ories with Sm art 5 technology are high-density, low-cost,

A18E

Abstract: 56-PIN LH28F320S3H-L LH28F320S3-L A17OI
Contextual Info: LH28F320S3-L/S3H-L PRELIMINARY SHARP LH28F320S3-L/S3H-L 32 M-bit 4 MB x 8/2 MB x 16 Smart 3 Flash Memories (Fast Programming) DESCRIPTION The LH28F320S3-L/S3H-L flash memories with Smart 3 technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide

3YWA

Abstract: 56-PIN
Contextual Info: LH28F320S5-L/S5H-L LH28F320S5-L/S5H-L 32 M-bit 4 MB x 8/2 MB x 16 Smart 5 Flash Memories (Fast Programming) DESCRIPTION A R Y • High performance read access time LH28F320S5-L90/S5H-L90 – 90 ns (5.0±0.25 V)/100 ns (5.0±0.5 V) LH28F320S5-L12/S5H-L12