RXBF Search Results

charmilles d10

Abstract: IP2022-120 IP2022/PQ80 RB1 Wlan Cardbus IP2012-120 RC728 ip2k Ubicom IP2000 IP2022
Contextual Info: PRELIMINARY March 17, 2003 IP2012 / IP2022 Wireless Network Processors Features and Performance Optimized for Network Connectivity Product Highlights The Ubicom IP2012 and IP2022™ Wireless Network Processors combine support for communication physical

68C92

Abstract: XR68C681 XR88C192
Contextual Info: XR68C92/192 DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER February 2005 DESCRIPTION The XR68C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 XR68C92 / 16 (XR68C192) bytes transmit and receive FIFO. The XR68C92/192 is a pin-to-pin compatible and an improved version of the

XR88C192

Contextual Info: XR88C92/192 DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER June 2003 DESCRIPTION The XR88C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 XR88C92 / 16 (XR88C192) bytes transmit and receive FIFO. The XR88C92/192 is a pin and functional replacement for the SC26C92 and an

XR88C92

Abstract: 88C92 XR88C192
Contextual Info: Preliminary Information XR88C92/192 DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER DESCRIPTION The XR88C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 XR88C92 / 16 (XR88C192) bytes transmit and receive FIFO. The XR88C92/192 is a pin and functional replacement for the

Marvell 88e1111 register map

Abstract: 88E1111 88E1111 PHY registers map 88E1111 register map 88E1111 config 88E1111 registers Marvell PHY 88E1111 alaska register map Marvell PHY 88E1111 MDIO read write sfp Marvell 88E1111 application note Marvell PHY 88E111 alaska
Contextual Info: LatticeECP3 Marvell SGMII Physical/MAC Layer Interoperability December 2009 Technical Note TN1197 Introduction This technical note describes an SGMII physical/MAC layer interoperability test between a LatticeECP3 device and the Marvell 88E1111 PHY. Specifically, the document discusses the following topics:

Auto-Negotiation flnp

Abstract: KSZ8862-32MQL 100BASE-FX ksz8862-32mql-fx eeprom 93c66 programmer schematic w 6556
Contextual Info: KSZ8862-16/32MQL 2-Port Ethernet Switch with Non-PCI Interface and Fiber Support Rev 3.0 General Description The KSZ8862M is 2-port switch with non-PCI CPU interface and fiber support, and is available in 8/16-bit and 32-bit bus designs see Ordering Information . This

Contextual Info: MARCH 1995 MA31754 PRELIMINARY INFORMATION DS3826-3.6 MA31754 PERIPHERAL SUPPORT CHIP PSC The MA31754 is a Peripheral Support Chip (PSC) designed to provide those features which are commonly required in an MA31750 processor system. It can be used to replace much of the external logic associated with wait state

transmitter circuit in GPR

Abstract: SCC68692 XR68C192 XR68C681 XR68C92 XR68C92CJ XR68C92CP XR68C92CV XR68C92IJ XR68C92IP
Contextual Info: XR68C92/192 DUAL UNIVERSAL ASYNCHRONOUS RECEIVER AND TRANSMITTER July 2001 DESCRIPTION The XR68C92/192 is a Dual Universal Asynchronous Receiver and Transmitter with 8 XR68C92 / 16 (XR68C192) bytes transmit and receive FIFO. The XR68C92/192 is a pin-to-pin compatible and an improved version of the

Contextual Info: NEC N E C ELECTRONICS INC 30E D • ¡1PD70335 V35 Plus 16-Bit Microcomputer: Advanced, High-Speed DMA, Single-Chip, CMOS NEC E lectro n ics Inc. Description The jtPD70335 (V35 Plus) is a high-performance, 16-bit slngle-chip microcomputer with a 16-bit external data

D7032

Abstract: NEC D70325
Contextual Info: SEC NEC Electronics Inc. pPD70325 V25 Plus 16-Bit Microcomputer: High-Speed DMA, Single-Chip, CMOS Description □ Internal 256-byte RAM memory The juPD70325 (V25 Plus) is a high-performance, 16-bit, single-chip microcomputer with an 8-bit external data

Contextual Info: M MCP2510 Stand-Alone CAN Controller with SPIΤΜ Interface FEATURES DESCRIPTION • Implements Full CAN V2.0A and V2.0B at 1 Mb/s - 0 - 8 byte message length - Standard and extended data frames - Programmable bit rate up to 1 Mb/s - Support for remote frames

Projects of LED scrolling text board

Abstract: scrolling led display board with PIC microcontroller Scrolling LED display project AN733 DK-2750 MCP2510 RG41 200B 0X378 procedure ISO 9001 TEMPLATE
Contextual Info: 00733a.book Page 1 Tuesday, May 30, 2000 8:44 AM AN733 Using the MCP2510 CAN Developer’s Kit Author: nected to an external bus using the off-board connector. For the purposes of this application note, the left node will be referred to as the PC node and the right

KSZ8851

Abstract: IPTV schematic KSZ8851-16 0831 schematic computer 80386 KSZ8851-16MLL TR KSZ8851-16MQL
Contextual Info: KSZ8851-16/32MQL/MQLI Single-Port Ethernet MAC Controller with 8/16-Bit or 32-Bit Non-PCI Interface Rev. 2.0 General Description The KSZ8851M-series is a single-port controller chip with a non-PCI CPU interface and is available in 8/16-bit and 32-bit bus designs. This datasheet describes the 128-pin

ksz8851

Abstract: KSZ8851-16MLLJ IPTV schematic KSZ885116MLLJ KSZ8851-16MLL
Contextual Info: KSZ8851-16MLLJ Single-Port Ethernet MAC Controller with 8-Bit or 16-Bit Non-PCI Interface Extended Temperature Support General Description The KSZ8851-16MLLJ is a single-port controller chip with a non-PCI CPU interface and is available in 8-bit and 16bit bus designs with extended temperature support (-40°C

E1210

Abstract: JT-G704 JT-G703 JT-G706 MT9072 MT9072AB MT9072AV PUB43801 PCM24 Y230
Contextual Info: MT9072 Octal T1/E1/J1 Framer Data Sheet Features • • • • • • • October 2004 Eight fully independent, T1/E1/J1 framers 3.3 V supply with 5 V tolerant inputs Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling Framing Modes:

hef4750

Abstract: hall marking code A04 hef4750 application an1993 philips TDA7052 application note Application Notes Compandor cookbook signetics rf data handbook 433Mhz RV Transmitter receiver SCHEMATIC DIAGRAMS signetics Analogue IC Dat ne602
Contextual Info: RF Communications Handbook Signetics Philips Semiconductors PHILIPS PHILIPS Signetics reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, describedorcontained herein in orderto improve design and/or performance. Signetics assumes no responsibility or liability for the use

CPU08

Abstract: M146805 M6805 M68HC08 MC68HC908BD48 freescale superflash
Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MC68HC908BD48 Data Sheet M68HC08 Microcontrollers MC68HC908BD48/D Rev. 2 9/2003 MOTOROLA.COM/SEMICONDUCTORS For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.

cde tsc

Abstract: pdcr 910 Composite Video to VGA CPU08 M146805 M6805 M68HC05 M68HC08 MC68HC908LD60 PDCR 910 series
Contextual Info: MC68HC908LD60 Technical Data M68HC08 Microcontrollers Rev. 1.1 MC68HC908LD60/D August 16, 2005 freescale.com MC68HC908LD60 Technical Data Freescale reserves the right to make changes without further notice to any products herein. Freescale makes no warranty, representation or guarantee regarding the

Turbo-8051

Abstract: W83L951DG MCS8051 W83L951FG 6818 RTC pwm fan speed control 8051 NEC CIR Nec Infrared protocol decoder PS2 KEYBOARD schematic SRAM 6116
Contextual Info: Winbond Mobile Keyboard and Embedded Controller W83L951DG W83L951FG Date: August/2006 Revision: 1.00 W83L951DG/W83L951FG W83L951DG/W83L951FG Data Sheet Revision History 1 PAGES DATES VERSION WEB VERSION n.a. 8/7/2006 1.0 1.0 MAIN CONTENTS First Release 2 3

NE5750

Abstract: NE5751 NE5751D NE5751N NES751 SA5750 SA5751 SA5751D SA5751N 100hz anti alias lowpass filter
Contextual Info: Philips Semiconductors specification Audio processor - filter and control section NE/SA5751 DESCRIPTION BENEFITS T h e N E /S A 57 5 1 is a high perform ance • Very com pact application PIN CONFIGURATION

Contextual Info: MT9072 Octal T1/E1/J1 Framer Advance Information DS5063 Features • • Eight fully independent, T1/E1/J1 framers 3.3V supply with 5V tolerant inputs • Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling • • Framing Modes:

Contextual Info: MT9072 Octal T1/E1/J1 Framer Advance Information Features • • • • • • • DS5063 Eight fully independent, T1/E1/J1 framers 3.3V supply with 5V tolerant inputs Selectable 2.048 Mbit/s or 8.192 Mbit/s serial buses for both data and signaling Framing Modes:

STK 0825

Abstract: MC68HC05BD7 68HC05BD2 68HC05BD7 68HC705BD7 non user mode HC05B PWM15 ddc protocol MC146805
Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. 68HC05BD7 68HC705BD7 68HC05BD2 SPECIFICATION REV 2.0 General Release  January 20, 1998 Technical Operation Taiwan Taipei, Taiwan For More Information On This Product, Go to: www.freescale.com

MT90225

Abstract: MT90225AG MT90226 MT90226AG MT9072 MT9076
Contextual Info: MT90225/6 16/8 Port TC PHY Device Data Sheet Features March 2004 General • Supports unframed serial streams up to 10 Mbps per T1/E1 or DSL link • Single chip ATM TC Transmission Convergence processor • Versatile TDM Interface compatible with most popular T1, E1 or DSL framers