MAX9218ECM Search Results

c485

Contextual Info: 19-3557; Rev 0; 2/05 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

MAX9217

Abstract: MAX9218 MAX9218ECM MAX9218ETM
Contextual Info: 19-3557; Rev 2; 10/05 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

MAX9217

Abstract: MAX9218 MAX9218ECM MAX9218ETM rgbout video in RGBout
Contextual Info: 19-3557; Rev 5; 8/09 KIT ATION EVALU E L B A AVAIL 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

D4S20D-40ML5-Z

Abstract: h911 D4S20D H914 H918 H714 H710 LVTLL 13h3 GRM21BR61C106K
Contextual Info: 19-4939; Rev 0; 9/09 MAX9217/MAX9218 Evaluation Kit The MAX9217/MAX9218 evaluation kit EV kit provides a proven design to evaluate the MAX9217 27-bit, 3MHz to 35MHz DC-balanced LVDS serializer and the MAX9218 27-bit, 3MHz to 35MHz DC-balanced LVDS deserializer.

MAX9217

Abstract: MAX9218 MAX9218ECM MAX9218ETM
Contextual Info: 19-3557; Rev 1; 4/05 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

MAX9217

Abstract: MAX9218 MAX9218ECM MAX9218ETM
Contextual Info: 19-3557; Rev 4; 5/08 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

MAX9217

Abstract: MAX9218 MAX9218ECM MAX9218ETM
Contextual Info: 19-3557; Rev 5; 8/09 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

Contextual Info: 19-3557; Rev 5; 8/09 KIT ATION EVALU E L B A AVAIL 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control

Contextual Info: 19-3557; Rev 3; 2/08 27-Bit, 3MHz-to-35MHz DC-Balanced LVDS Deserializer The MAX9218 digital video serial-to-parallel converter deserializes a total of 27 bits during data and control phases. In the data phase, the LVDS serial input is converted to 18 bits of parallel video data and in the control