MAX9110 Search Results

8SOT23

Abstract: 8-SOT23 017a DS90LV018A MAX9110 MAX9111 MAX9112 MAX9113 8SOT-23
Contextual Info: LOWEST PULSE SKEW LVDS DRIVERS AND RECEIVERS 250ps Maximum Pulse Skew—87% Less Timing Distortion LVTTL/ CMOS +3.3V DRIVER RECEIVER MAX9110 SINGLE MAX9112 (DUAL) MAX9111 (SINGLE) MAX9113 (DUAL) T23 SO -8 2.5ns MAX9110 3.0 IDEAL m m LVDS +3.3V m LVTTL/ CMOS

Contextual Info: 19-1771; Rev 0; 9/00 Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9110/MAX9112 single/dual low-voltage differential signaling LVDS transmitters are designed for high-speed applications requiring minimum power consumption, space, and noise. Both devices support

MAX9110

Abstract: MAX9110EKA-T MAX9110ESA MAX9111 MAX9112 MAX9113 AADO
Contextual Info: 19-1771; Rev 0; 9/00 Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9110/MAX9112 single/dual low-voltage differential signaling LVDS transmitters are designed for high-speed applications requiring minimum power consumption, space, and noise. Both devices support

tsc4429

Abstract: TSC7660 TSC7107 TSC7106 TSC7109 TSC7117 TSC1426 TSC7650 tsc4427 lt1174
Contextual Info: Code Key: PU – PP – FE – SP – Plug-In Upgrade Pin-for-Pin Compatible Functional Equivalent Similar Part AMCC MAXIM S3005 S3006 S3017 S3023 S3024 S3025 S3026 S3027 S3028B S3033 S3040 S3043 S3044 S3047 S3049 S3050 MAX3690 MAX3680 MAX3690 MAX3675 MAX3675

MAX3234

Abstract: maxim dallas 2501 jtag gd75232 DALLAS 2501 jtag PL-2303 LGA 775 SOCKET PIN LAYOUT SN75176 PL-2303 SN75179 application MAX490 schematic
Contextual Info: R E A L W O R L D S I G N A L P TM R O C E S S I N G Interface Selection Guide 2Q 2004 Table of Contents Introduction .3 Data Line Circuits High-Speed Interconnect LVDS, xECL, CML .4

HC9S08JM

Contextual Info: Data Sheet May 2012 DS31408 Demo Kit General Description The DS31408DK is an easy-to-use evaluation kit for the DS31408 timing IC. A surface-mounted DS31408 and careful layout provide maximum signal integrity. An onboard low-phase-noise stratum 3 quality oscillator is

capacitor 11kv

Abstract: MAX9111ESA DS90LV018A DS90LV028A MAX9110 MAX9111 MAX9111EKA MAX9112 MAX9113
Contextual Info: 19-4802; Rev 0; 7/00 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features ♦ Low 300ps max Pulse Skew for High-Resolution Imaging and High-Speed Interconnect ♦ Space-Saving 8-Pin SOT23 and SO Packages ♦ Pin-Compatible Upgrades to DS90LV018A and

DS90LV110

Abstract: MAX9150 MAX9153 MAX9153EUI MAX9154 MAX9154EUI PS2-20-450
Contextual Info: 19-2167; Rev 0; 10/01 Low-Jitter, 800Mbps, 10-Port LVDS Repeaters with 100Ω Drive The MAX9153/MAX9154 low-jitter, low-voltage differential signaling LVDS repeaters are ideal for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The devices accept a

capacitor 11kv

Abstract: MAX9111ESA DS90LV018A DS90LV028A MAX9110 MAX9111 MAX9111EKA MAX9112 MAX9113
Contextual Info: 19-1803; Rev 2; 12/07 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9111/MAX9113 single/dual low-voltage differential signaling LVDS receivers are designed for highspeed applications requiring minimum power consumption, space, and noise. Both devices support

MAX9150

Abstract: MAX9150EUI
Contextual Info: 19-1815; Rev 1; 3/09 KIT ATION EVALU E L B AVAILA Low-Jitter, 10-Port LVDS Repeater The MAX9150 low-jitter, 10-port, low-voltage differential signaling LVDS repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device

6-Pin SC70 theta jc value

Contextual Info: MAX9130 RELIABILITY REPORT FOR MAX9130EXT+ PLASTIC ENCAPSULATED DEVICES June 14, 2011 MAXIM INTEGRATED PRODUCTS 120 SAN GABRIEL DR. SUNNYVALE, CA 94086 Approved by Sokhom Chum Quality Assurance Reliability Engineer Maxim Integrated Products. All rights reserved.

HDMI TO VGA MONITOR PINOUT

Abstract: HDMI to vga pinout china DVD player card circuit diagram serdes hdmi optical fibre mp3 player circuit diagram by using msp430 PL-2303 SN75179 application VGA TO HDMI PINOUT meter-bus HDMI cat5
Contextual Info: TM Technology for Innovators Interface Selection Guide 4Q 2006 2 ➔ Interface Selection Guide Table of Contents Introduction 3 LVDS, xECL, CML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Multipoint-LVDS M-LVDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

MAXINT1

Abstract: fairchild diode aa14
Contextual Info: MAX14808 Evaluation System Evaluates: MAX14808 General Description The MAX14808 evaluation kit EV kit provides a proven design to evaluate the MAX14808 high-voltage, highfrequency pulse driver IC. The MAX14808 evaluation system (EV system) consists of the MAX14808 EV kit and a companion MAXINT1 serial

MAX9111ESA

Contextual Info: 19-4802; Rev 1; 2/07 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9111/MAX9113 single/dual low-voltage differential signaling LVDS receivers are designed for highspeed applications requiring minimum power consumption, space, and noise. Both devices support

p190lv

Abstract: PL-2303 P190 sp202 MAXIM RS422 usb interface MAXIM RS422 maxim max202 PCA82C251 dvi to lvds MAX202 CROSS REFERENCE
Contextual Info: 64001.qxd 2/3/04 11:06 AM Z-fold Page 1 Z-fold R E A L Selecting a Standard Infotainment Safety and security Powertrain ⇒ ⇒ ⇒ LVDS, CAN CAN, RS-422, LVDS, 1394 CAN Portable Non-portable ⇒ ⇒ USB, RS-232, 1394, LVDS USB, LVDS, RS-232 Field bus Motor/motion control

Contextual Info: Data Sheet May 2012 DS31415 Demo Kit General Description The DS31415DK is an easy-to-use evaluation kit for the DS31415 timing IC. A surface-mounted DS31415 and careful layout provide maximum signal integrity. An onboard low-phase-noise TCXO is provided for device

tmds specification

Abstract: ADM2209 HDMI TO VGA MONITOR PINOUT HVGA TFT LCD driver VMEH22501 MAX202 circuit diagram tlk10021 rs422 msp430 diagram LG LCD TV circuits PL-2303
Contextual Info: 接口选择指南 2006 年第四季度 2 接口选择指南 目录 3 绪论 下载最新的模拟应用 LVDSxECL、CML（低电压差分信号传输、发射级耦合逻辑、电流模式逻辑）………4 期刊 以及过刊 ，让 多点式低电压差分信号传输 (M-LVDS) ……………………………………………………8

Contextual Info: Data Sheet May 2012 DS31400 Demo Kit General Description The DS31400DK is an easy-to-use evaluation kit for the DS31400 dual DPLL timing IC. A surface-mounted DS31400 and careful layout provide maximum signal integrity. An on-board low-phase-noise stratum 3

TSC7660

Abstract: tsc4429 TSC7117 TSC7106 tsc7650 tsc7107 lt1174 TSC7109 TLV2274 transistor mc331
Contextual Info: Code Key: PU – Plug-In Upgrade PP – Pin-for-Pin Compatible FE – Functional Equivalent SP – Similar Part Industry Cross-Reference Guide CODE AMCC MAXIM S3005 S3006 S3017 S3023 S3024 S3025 S3026 S3027 S3028B S3033 S3040 S3043 S3044 S3047 S3049 S3050

Contextual Info: 19-1803; Rev 3; 3/09 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features The MAX9111/MAX9113 single/dual low-voltage differential signaling LVDS receivers are designed for highspeed applications requiring minimum power consumption, space, and noise. Both devices support

DS90LV018A

Abstract: DS90LV028A MAX9110 MAX9111 MAX9111EKA MAX9111ESA MAX9112 MAX9113
Contextual Info: 19-4802; Rev 0; 7/00 Single/Dual LVDS Line Receivers with Ultra-Low Pulse Skew in SOT23 Features ♦ Low 300ps max Pulse Skew for High-Resolution Imaging and High-Speed Interconnect ♦ Space-Saving 8-Pin SOT23 and SO Packages ♦ Pin-Compatible Upgrades to DS90LV018A and

DS31407

Abstract: DS31407GN HC9S08JMxx Multiplier 16pin 670mhz
Contextual Info: 19-5853; Rev 0; 5/11 DS31407 Demo Kit Evaluates: DS31407 General Description The DS31407 demo kit DK is an easy-to-use demonstration kit for the DS31407 single DPLL timing IC. A surface-mounted DS31407 and careful layout provide maximum signal integrity. An on-board low-phase-noise

MAX9150

Abstract: MAX9150EUI
Contextual Info: 19-1815; Rev 0; 10/00 KIT ATION EVALU E L B AVAILA Low-Jitter, 10-Port LVDS Repeater The MAX9150 low-jitter, 10-port, low-voltage differential signaling LVDS repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device

Contextual Info: 19-1995; Rev 0; 4/01 Single LVDS Line Receiver in SC70 The MAX9115 accepts an LVDS differential input and translates it to an LVTTL/LVCMOS output. The fail-safe feature sets the output high when the inputs are undriven and open, terminated, or shorted. The device supports a wide common-mode input range, allowing a