MARKING D9N Search Results

Contextual Info: SN74LVC1G29 2-OF-3 DECODER/DEMULTIPLEXER www.ti.com SCES569B – JUNE 2004 – REVISED JANUARY 2007 FEATURES • • • • • • • • Available in the Texas Instruments NanoFree Package Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 5.1 ns at 3.3 V

D9N MARKING CODE

Contextual Info: SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 SN74LVC1G29 2-of-3 Decoder/Demultiplexer Check for Samples: SN74LVC1G29 FEATURES DESCRIPTION • This decoder is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • •

Contextual Info: SN74LVC1G29 www.ti.com SCES569C – JUNE 2004 – REVISED JANUARY 2014 SN74LVC1G29 2-of-3 Decoder/Demultiplexer Check for Samples: SN74LVC1G29 FEATURES DESCRIPTION • This decoder is designed for 1.65-V to 5.5-V VCC operation. 1 2 • • • • • •

Rohm part marking

Abstract: 05 marking code transistor ROHM marking D9 ROHM MARKING PACKAGE transistor marking D9 ROHM marking marking code transistor ROHM UMT6 INVERTER 50 kW DTA114Y
Contextual Info: UMD9N / IMD9A Transistors Digital Transistor Dual Digital Transistors for Inverter Drive UMD9N / IMD9A ! Features ! External dim ensions (Units : mm) 1) DTA114Y and DTC114Y transistors are built-in a SMT package. ! Absolute maximum ratings (Ta=25°C) Sym bol

MO-220-VNND-4

Contextual Info: REVISIONS LTR DESCRIPTION DATE Prepared in accordance with ASME Y14.24 APPROVED Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 PMIC N/A PREPARED BY Phu H. Nguyen Original date of drawing YY MM DD CHECKED BY 13-01-11 Phu H. Nguyen

D9N10

Abstract: STD9N10 STD9N10-1 STD9N10T4 DPak Package dimensions
Contextual Info: STD9N10 STD9N10-1 N-CHANNEL 100V - 0.23 Ω - 9A DPAK/IPAK POWER MOS TRANSISTOR Table 1. General Features Figure 1. Package Type VDSS RDS on ID STD9N10 100 V < 0.27 Ω 9A STD9N10-1 100 V < 0.27 Ω 9A FEATURES SUMMARY • TYPICAL RDS(on) = 0.23 Ω ■ AVALANCHE RUGGED TECHNOLOGY

P9NM60

Contextual Info: STP9NM60 STD9NM60 - STD9NM60-1 N-CHANNEL 600V - 0.55Ω - 8.3A TO-220/DPAK/IPAK MDmesh Power MOSFET TARGET DATA TYPE STP9NM60 STD9NM60 STD9NM60-1 • ■ ■ ■ ■ ■ VDSS RDS on ID Pw 600 V 600 V 600 V < 0.60 Ω < 0.60 Ω < 0.60 Ω 8.3 A 8.3 A 8.3 A

STP9N

Contextual Info: STP9NM60 STD9NM60 - STD9NM60-1 N-CHANNEL 600V - 0.55Ω - 8.3A TO-220/DPAK/IPAK MDmesh Power MOSFET TARGET DATA TYPE STP9NM60 STD9NM60 STD9NM60-1 • ■ ■ ■ ■ ■ VDSS RDS on ID Pw 600 V 600 V 600 V < 0.60 Ω < 0.60 Ω < 0.60 Ω 8.3 A 8.3 A 8.3 A

STD9NM60

Abstract: STD9NM60-1 STD9NM60T4 STP9NM60
Contextual Info: STP9NM60 STD9NM60 - STD9NM60-1 N-CHANNEL 600V - 0.55Ω - 8.3A TO-220/DPAK/IPAK Zener-Protected MDmesh Power MOSFET TARGET DATA TYPE STP9NM60 STD9NM60 STD9NM60-1 • ■ ■ ■ ■ ■ VDSS RDS on ID Pw 600 V 600 V 600 V < 0.60 Ω < 0.60 Ω < 0.60 Ω

STD9NM60T4

Abstract: STD9NM60 STD9NM60-1 STP9NM60 D9NM60 STP9NM
Contextual Info: STP9NM60 STD9NM60 - STD9NM60-1 N-CHANNEL 600V - 0.55Ω - 8.3A TO-220/DPAK/IPAK MDmesh Power MOSFET TARGET DATA TYPE STP9NM60 STD9NM60 STD9NM60-1 • ■ ■ ■ ■ ■ VDSS RDS on ID Pw 600 V 600 V 600 V < 0.60 Ω < 0.60 Ω < 0.60 Ω 8.3 A 8.3 A 8.3 A

D9N05

Abstract: D9N05CL
Contextual Info: NID9N05CL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation Features • • • • • Diode Clamp Between Gate and Source

STD9NM60N

Abstract: STF9NM60N STP9NM60N P9NM60N STD9NM60N-1 F9NM60N VDD30-0 VDD480 STF9NM60
Contextual Info: STD9NM60N - STD9NM60N-1 STP9NM60N - STF9NM60N N-CHANNEL 600V - 0.51Ω - 9A - TO220/TO-220FP/DPAK/IPAK SECOND GENERATION MDmesh MOSFET Target Specification Package General features VDSS Type @Tjmax RDS(on) ID 3 2 STD9NM60N STD9NM60N-1 STF9NM60N STP9NM60N

D9N10

Abstract: STD9N10 STD9N10-1 STD9N10T4 T432 airbag
Contextual Info: STD9N10 STD9N10-1 N-CHANNEL 100V - 0.23 Ω - 9A DPAK/IPAK POWER MOS TRANSISTOR Table 1. General Features Figure 1. Package Type VDSS RDS on ID STD9N10 100 V < 0.27 Ω 9A STD9N10-1 100 V < 0.27 Ω 9A FEATURES SUMMARY • TYPICAL RDS(on) = 0.23 Ω ■ AVALANCHE RUGGED TECHNOLOGY

NORTHBRIDGE* reflow

Abstract: pin diagram AMD phenom II - X4 RX980 990FX RD990 ATI RADEON reflow profile RD980 amd RADEON igp 215-0716046 AMD Phenom II x4
Contextual Info: AMD 990FX/990X/970 Databook Technical Reference Manual Rev 3.00 P/N: 48691_990FX_ds_nda 2012 Advanced Micro Devices, Inc. Trademarks AMD, the AMD Arrow logo, AMD Phenom, AMD Cool'n'Quiet, and combinations thereof, ATI, the ATI logo, Radeon, and CrossFire are trademarks of Advanced

D9N05

Abstract: D9N05CL
Contextual Info: NID9N05CL Power MOSFET 9 Amps, 52 Volts N−Channel, Logic Level, Clamped MOSFET w/ ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation VDSS Clamped RDS(ON) TYP ID MAX

STF9NM50N

Abstract: F9NM50N JESD97 STD9NM50N STD9NM50N-1 STP9NM50N
Contextual Info: STD9NM50N - STD9NM50N-1 STF9NM50N - STP9NM50N N-channel 500V - 0.47Ω - 7.5A - TO-220 - TO-220FP - IPAK - DPAK Second generation MDmesh Power MOSFET Features Type VDSS @Tjmax RDS(on) ID STD9NM50N 550V <0.56Ω 7.5A STD9NM50N-1 550V <0.56Ω 7.5A 3 1

d9n05cl

Abstract: A 0412 MOSFET gate to drain clamp 369A-13 AN569 NID9N05CL NID9N05CLT4 mosfet transistor 400 volts.100 amperes D9N05
Contextual Info: NID9N05CL Power MOSFET 9 Amps, 52 Volts N-Channel, Logic Level, Clamped MOSFET w/ ESD Protection in a DPAK Package http://onsemi.com Benefits 9 AMPERES 52 V CLAMPED RDS on = 90 mW (Typ.) • High Energy Capability for Inductive Loads • Low Switching Noise Generation

05CLG

Abstract: marking d9n AN569 D9N05CL NID9N05CL NID9N05CLG NID9N05CLT4 NID9N05CLT4G D9N05
Contextual Info: NID9N05CL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation VDSS Clamped RDS(ON) TYP ID MAX (Limited)

d9n05cl

Abstract: AN569 NID9N05CL NID9N05CLT4
Contextual Info: NID9N05CL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation Features • • • • • Diode Clamp Between Gate and Source

Contextual Info: NID9N05CL, NID9N05ACL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation VDSS Clamped RDS(ON) TYP

Contextual Info: NID9N05CL, NID9N05ACL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation VDSS Clamped RDS(ON) TYP

Marking D9N

Abstract: NID9N05ACL A 673 C2 transistor NID9N05ACLT4G 05AC NID9N05CLG
Contextual Info: NID9N05CL, NID9N05ACL Power MOSFET 9.0 A, 52 V, N−Channel, Logic Level, Clamped MOSFET w/ESD Protection in a DPAK Package http://onsemi.com Benefits • High Energy Capability for Inductive Loads • Low Switching Noise Generation VDSS Clamped RDS(ON) TYP

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software DAC3174 www.ti.com SLAS837A – APRIL 2013 – REVISED MAY 2013 Dual 14-bit 500 MSPS Digital to Analog Converter FEATURES APPLICATIONS • • • • • 1 2 • • •

Contextual Info: Product Folder Sample & Buy Technical Documents Support & Community Tools & Software DAC3174 www.ti.com SLAS837A – APRIL 2013 – REVISED MAY 2013 Dual 14-bit 500 MSPS Digital to Analog Converter FEATURES APPLICATIONS • • • • • 1 2 • • •