MACH1 Search Results

MACH130-20

Abstract: MACH130 MACH230 PAL22V10 PAL26V16
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 MACH130-15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks

PAL26V16

Abstract: MACH130-20 PAL 007 64 macrocells PAL 007 A MACH130 MACH230 PAL22V10 MACH130-20/BXA
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 MACH130-15/20 Lattice/Vantis High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks

Contextual Info: FINAL COM’L: -12/15/20 IND: 14/18/24 a MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 38 Inputs ■ 32 Macrocells ■ 32 Outputs ■ 12 n s t P D Commercial 14 nstpD Industrial

O-81-4

Abstract: MACH211SP MACH110 MACH111SP PALCE22V10 MACH111SP-10JC PALCE* programming
Contextual Info: FINAL COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH111SP-5/7/10/12/15 High-Density EE CMOS Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-Compatible, 5-V in-system programming ■ Programmable power-down mode

MACH120

Abstract: mach 3 family amd AMD Graphics schematics PAL26V12 mach 1 to 5 from amd mach 1 family amd teradyne lasar MACH220 PAL22V10 mach schematic
Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 Advanced Micro Devices MACH120-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 68 Pins 56 Inputs 48 Macrocells 48 Outputs 12 ns tPD Commercial 18 ns tPD Industrial 48 Flip-flops; 4 clock choices

MACH120

Abstract: PALCE22V10 PALCE26V12 mach 1 family PALCE* programming
Contextual Info: MACH 1 & 2 FAMILIES 1 FINAL IND: -18 MACH120-12/15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 68 Pins in PLCC ◆ 48 Macrocells ◆ 12 ns tPD Commercial, 18 ns tPD Industrial ◆ ◆ ◆ ◆ ◆ ◆ ◆ 77 MHz fCNT Commercial

Contextual Info: CONDENSED COM’L: -12/15/20 IND: -18/24 MACH120-12/15/20 High-Density EE CMOS Programmable Logic Devices DISTINCTIVE CHARACTERISTICS • 68 Pins ■ 56 Inputs ■ 48 Macrocells ■ 48 Outputs ■ 12 ns tro Commercial 18 ns tpo Industrial ■ 48 Flip-flops; 4 clock choices

MACHpro

Abstract: HP3070 PALCE22V10 ALL-07 PROGRAMMER pic
Contextual Info: 1 FINAL MACH 1 & 2 FAMILIES COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 MACH 1 & 2 Families MACH131SP-5/7/10/12/15 High-Performance EE CMOS In-System Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ JTAG-compatible, 5-V in-system programming ◆ 100 Pins in PQFP and TQFP

MACH130

Contextual Info: F IN A L COM’L: -15/20 IND: -18/24 MACH130-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ 64 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 4 clock choices ■ ■ 4 “PAL26V16” Blocks

st 833

Abstract: mach-355
Contextual Info: " V V A A N iv A M D T I s MACH SELECTOR GUIDE C O M P A N Y M ACH 1 & 2 FAMILIES P Tpe r Output Fam ily MACH 1 Device Package M acroceH s P LO Gates MACH111-5 44PLCC, 44TQFP 32 (1250} MACH111-7 1/08 Dedicated Inputs 32 6 Output Enables Com m ercial (w /NO

MS1028

Abstract: MACH130-20 MACH130 teradyne lasar MACH230 PAL22V10 mach 1 to 5 from amd MACH Programmer mach 1 family amd PAL26V16
Contextual Info: FINAL COM’L: -15/20 IND: -18/24 Advanced Micro Devices MACH130-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS 84 Pins 64 Outputs 64 Macrocells 64 Flip-flops; 4 clock choices 15 ns tPD Commercial 18 ns tPD Industrial 4 “PAL26V16” Blocks

PPI-0223

Abstract: MACH130 PALCE22V10 Tag c0 665 800 MACH131sp
Contextual Info: PRELIMINARY COM’L: -5/7.5/10/12/15 IND: -7.5/10/12/14/18 MACH131SP-5/7/10/12/15 High-Density EE CMOS In-System Programmable Logic V A N T I S The Programmable Logic Company From AMD DISTINCTIVE CHARACTERISTICS • JTAG-compatible, 5-V in-system programming

BP1148

Abstract: MACH111-20JC MACH110 MACH210 MACH215 PAL22V10
Contextual Info: FINAL COM’L: -5/7.5/10/12/15/20 IND: -7.5/10/12/14/18/24 MACH111 Family High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ Programmable power-down mode ■ 32 Macrocells ■ 32 Outputs ■ 5 ns tPD ■ 32 Flip-flops; 4 clock choices

Contextual Info: PA-MACH44 Z (-LD) Data Sheet 44 pin PLCC socket/28 pin DIP 0.6” plug Supported Device/Footprints Adapter Construction Using this adapter, the AMD MACH110, 210 & 215 in either PLCC or CLCC package can be programmed on DIP programmers. The PA-MACH44-LD is for use with the Logical

Contextual Info: MACH120-15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 68 Pins 56 Inputs ■ 48 Macrocells 48 Outputs ■ 15 ns tpD Commercial 20 ns tpo Military 48 Flip-flops; 4 clock choices ■ 50 MHz fMAx Commercial

Contextual Info: CO M ’L: -12/15/20 MIL: -20 MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 38 Inputs ■ 32 Macrocells ■ 32 Outputs ■ 12 ns tPD Com m ercial 20 ns t p D M ilitary ■ 32 Flip-flops; 2 clock choices

Contextual Info: bOE D • D2S7S2b G033Qüfl 3fl7 ■ AMD2 ADV niCRO PLA/PLE/ARRAYS COM’L: -12/15/20 "T- ll-Q r] MIL: -20 MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS ■ 44 Pins ■ 38 Inputs ■ 32 Macrocells

MACH111SP

Abstract: HP3070 MACH211SP PALCE22V10
Contextual Info: 1 FINAL MACH 1 & 2 FAMILIES COM’L: -5/7/10/12/15 IND: -7/10/12/14/18 MACH 1 & 2 Families MACH111SP-5/7/10/12/15 High-Performance EE CMOS In-System Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ JTAG-Compatible, 5-V in-system programming ◆ 44 Pins in PLCC and TQFP

PAL22V16

Abstract: MACH110 MACH210 MACH215 PAL22V10 AIR33
Contextual Info: FINAL COM’L: -12/15/20 IND: -14/18/24 MACH110-12/15/20 Lattice Semiconductor High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial 14 ns tPD Industrial

mach 1 family

Contextual Info: CONDENSED COM’L :-7.5/10/12/15/20 MACH131 -7/10/12/15/20 " “ ¡g* High-Density EE CMOS Programmable Logic Devices DISTINCTIVE CHARACTERISTICS • 84 Pins ■ Programmable power-down mode ■ 64 Macrocells ■ 64 Outputs ■ 7.5 ns tpo ■ 64 Flip-flops; 4 clock choices

MACH120

Abstract: PALCE22V10 PALCE26V12
Contextual Info: MACH 1 & 2 FAMILIES 1 FINAL IND: -18 MACH120-12/15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS ◆ 68 Pins in PLCC ◆ 48 Macrocells ◆ 12 ns tPD Commercial, 18 ns tPD Industrial ◆ ◆ ◆ ◆ ◆ ◆ ◆ 77 MHz fCNT Commercial

Contextual Info: PA-MACH210-Q06T Data Sheet 44 pin QFP socket/28 pin DIP 0.6” plug Supported Device/Footprints Adapter Construction Using this adapter, the AMD MACH110, 210 & 215 in the QFP package can be programmed on DIP programmers. The adapter is made up of 3 sub-assemblies. They assemble via

mach 1 family amd

Abstract: PAL22V16 AMD socket s1 MACH110 12JC 14JI teradyne lasar MACH110 MACH210 MACH215 PAL22V10 mach 1 to 5 from amd
Contextual Info: FINAL COM’L: -12/15/20 IND: -14/18/24 Advanced Micro Devices MACH110-12/15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial 14 ns tPD Industrial

PAL22V16

Abstract: MACH110 MACH210 MACH215 PAL22V10
Contextual Info: FINAL COM’L: -12/15/20 IND: -14/18/24 MACH110-12/15/20 Lattice/Vantis High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial 14 ns tPD Industrial