M74HC13 Search Results

pin diagram of ic 74ls139

Abstract: M74HC139P circuit of 1-8 demultiplexer 74LS139 equivalent 4000B 74LS139 M74HC139 M74HC139DP
Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M74HC139P M74HC139DP D U A L l- O F - 4 D E C O D E R /D E M U L T IP L E X E R DESCRIPTION The M74HC139 is a semiconductor integrated circuit con­ sisting of a 2-bit binary to divide-by-4 decoder/demultiplex­ er circuits with chip select inputs.

M74HC139

Abstract: M74HC139B1R M74HC139M1R M74HC139RM13TR M74HC139TTR PO13H TSSOP16
Contextual Info: M74HC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: 5bE D 712^237 DDBIflbS 7SD • S G T H M54HC131 M74HC131 S G S -T H O M S O N S G S-TH0nS0N T - é 7 'Z - r r 3 TO 8 LINE DECODER/LATCH ■ LOW POWER DISSIPATION ICC = 4 fiA (MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY V N I H = VN|L = 28% VCC (MIN.) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: M54HC139 M74HC139 r Z J SGS-THOMSON DUAL 2 TO 4 DECODER/DEMULTIPLEXER • HIGH SPEED tPD = 12 ns TYP. AT Vcc = 5 V ■ LOW POWER DISSIPATION Ice = 4 pA (MAX.) AT Ta = 25 "C ■ HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) ■ OUTPUT DRIVE CAPABILITY

Contextual Info: C T S C S -T H O M S O N *7# dO g[i3 iLi(gra at VCc = 5V ■ LOW POWER DISSIPATION Ice = 4 at TA = 25°C ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ BALANCED PROPAGATION DELAYS

Contextual Info: M74HC132 QUAD 2-INPUT SCHMITT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 11ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH(TYP.) = 0.9 V AT VCC = 5 V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

74HC139

Contextual Info: M54HC139 M74HC139 SGS-THOMSON 5 Ï . io DUAL 2-TO-4 LINE DECODER/DEMULTIPLEXER • HIGH SPEED tpo = 16 ns TYP. at V c c = 5V ■ LOW POWER DISSIPATION lCC = 4 /iA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY VN|H = VNIL = 28% VCc (MIN.) ■ OUTPUT DRIVE CAPABILITY

M74HC138P

Contextual Info: M IT SU BISH I HIGH S P E E D CM O S M74HC138P M74HC138DP l-O F -8 D E C O D E R /D E M U L T IP L E X E R DESCRIPTION T h e M 7 4 H C 1 3 8 is a sem ico nd u cto r integrated circuit co n­ PIN CONFIGURATION TOP VIEW sistin g of a 3 -bit binary to 8 -line d e c o d e r/d e m u ltip le x e r with

74ls137 demultiplexer

Abstract: ic 74ls137 74LS137 4000B M74HC137 M74HC137P
Contextual Info: M IT S U B IS H I HIGH S P E E D C M O S M 74H C 137P l- O F - 8 D E C O D E R /D E M U L T IP L E X E R W IT H A D D R E S S LA T C H DESCRIPTION The M74HC137 is a semiconductor integrated circuit con­ PIN CONFIGURATION TOP VIEW sisting of a 3-bit binary to 8-line decoder/dem ultiplexer with

M74HC133

Contextual Info: M54HC133 M74HC133 SGS-THOMSON * 5 7 ILO 13 INPUT NAND GATE HIGH SPEED tpD = 13 ns TYP. at Vcc = 5 V LOW POWER DISSIPATION Ice = 1 HA (MAX.) at Ta = 25* C HIGH NOISE IMMUNITY V nih = V nil = 28 % Vcc (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OutpuT IMPEDANCE

74HC131

Contextual Info: M54HC131 M74HC131 SGS-THOMSON iy 3 TO 8 LINE DECODER/LATCH • LOW POWER DISSIPATION |c c = 4 yA MAX. at TA = 25°C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28»/o VCC (MIN.) ■ OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS ■ SYMMETRICAL OUTPUT IMPEDANCE |>OHl = Iol = 4 mA (MIN.)

M74HC138RM13TR

Abstract: M74HC138 M74HC138M1R M74HC138TTR M74HC138B1R PO13H TSSOP16 M74HC138B1
Contextual Info: M74HC138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

h d 2001

Abstract: M74HC133RM13TR M74HC133 M74HC133B1R M74HC133M1R M74HC133TTR PO13H M74HC133M1
Contextual Info: M74HC133 13 INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 14 ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: M74HC132 QUAD 2-INPUT SCHMITT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 11ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VH(TYP.) = 0.9 V AT VCC = 5 V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: M74HC138 3 TO 8 LINE DECODER INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 13ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

Contextual Info: M IT S U B IS H I HIGH SPEED CMOS M74HC139P M74HC139DP DUAL l-O F -4 D E C O D E R /D E M U L T IP L E X E R DESCRIPTION The M 74H C 139 is a sem ico ndu ctor inte grated circu it con­ PIN CONFIGURATION TOP VIEW sisting of a 2 -b it binary to d iv id e -b y -4 d e c o d e r/d e m u ltip le x ­

Contextual Info: M ITSU B ISH I HIGH SPEED CMOS M74HC137P l-O F -8 D E C O D E R /D E M U L T IP L E X E R W ITH ADDRESS LATCH DESCRIPTION The M 74H C 137 is a sem iconductor inte grated circu it con­ PIN CONFIGURATION TOP VIEW sisting of a 3 -b it binary to 8-lin e d e c o d e r/d e m u ltip le x e r with

data sheet 74HC139

Abstract: M54HC139 M54HC139F1R M74HC139 M74HC139B1R M74HC139C1R M74HC139M1R 0700F m74hc139b1
Contextual Info: M54HC139 M74HC139 DUAL 2 TO 4 DECODER/DEMULTIPLEXER . . . . . . . . HIGH SPEED tPD = 12 ns TYP. AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS

M74HC133RM13TR

Contextual Info: M74HC133 13 INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 14 ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

M54HC133

Abstract: M54HC133F1R M74HC133 M74HC133B1R M74HC133C1R M74HC133M1R
Contextual Info: M54HC133 M74HC133 13 INPUT NAND GATE . . . . . . . . HIGH SPEED tPD = 13 ns TYP. at VCC = 5 V LOW POWER DISSIPATION ICC = 1 µA (MAX.) at TA = 25° C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OutpuT IMPEDANCE

M74HC131

Abstract: M74HC131B1R M74HC131M1R M74HC131RM13TR M74HC131TTR PO13H TSSOP16
Contextual Info: M74HC131 3 TO 8 LINE DECODER/LATCH • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 22ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

74HC137

Abstract: M74HC137 M74HC137B1R M74HC137M1R M74HC137RM13TR M74HC137TTR PO13H m74hc137b1
Contextual Info: M74HC137 3 TO 8 LINE DECODER/LATCH INVERTING • ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD =18ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

M74HC133M1R

Abstract: M74HC133 M74HC133B1R M74HC133RM13TR M74HC133TTR
Contextual Info: M74HC133 13 INPUT NAND GATE • ■ ■ ■ ■ ■ ■ HIGH SPEED : tPD = 14 ns TYP. at VCC = 6V LOW POWER DISSIPATION: ICC =1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN)

74HC139

Contextual Info: M54HC139 M74HC139 SCS-THOMSON m DUAL 2-TO-4 LINE DECODER/DEMULTIPLEXER • HIGH SPEED tpD = 16 ns TYP. at V c c = 5V ■ LOW POW ER DISSIPATION Ic e = 4 (MAX.) at TA = 2 5 °C ■ HIGH NOISE IM M U N ITY V n ih = V NtL = 28<>/o VCc (MIN.) ■ O UTPUT DRIVE CAPABILITY