LWL1R Search Results

Contextual Info: M O SEL VITELIC V53C311616500 3.3 VOLT 1 M X 16 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 70 Max. RAS Access Time, Irac 50 ns 60 ns 70 ns Max. Column Address Access Time, (^ aa) 25 ns 30 ns 35 ns Min. Extended Data Out Page Mode Cycle Time, fcc)

53C400

Contextual Info: M O SEL VTTEU C V400J8/9 4M X 8, 4M X 9 B IT FAST PAGE MODE CMOS DYNAMIC RAM MEMORY MODULE HIGH PERFORMANCE, LO W POWER 70/70L 80/BOL 10/10L Max. RAS Access Time, tRAC 70 ns 80 ns 100 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 50 ns HIGH PERFORMANCE V400J8/9

Contextual Info: M O S E L VITELIC V53C 404B H IG H PER FO R M AN C E, L O W PO W ER 1 M X 4 B IT F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE V53C404B 60 70 80 10 Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (1rA A )

equivalent tt 2246

Abstract: ms1953
Contextual Info: M O SEL V iT E U C V53C400B HIGH PERFORMANCE, LOW POWER 4M X 1 BIT FAST PAGE MODE CMOS DYNAMIC RAM 60 70 80 10 Max. RAS Access Time, 1R Ar 60 ns 70 ns 80 ns 100 ns Max. Column Address Access Time, (trA A ) 30 ns 35 ns 40 ns 50 ns HIGH PERFORMANCE V53C400B

Contextual Info: M O S E L V IT E L IC VS3C8125H ULTRA-HIGH PERFORMANCE, 128K X 8 B IT FAST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE PRELIMINARY 35 40 45 50 Max. RAS Access Time, lRAc 35 ns 40 ns 45 ns 50 ns Max. Column Address Access Time, (tCAA) 18 ns 20 ns 22 ns 24 ns

Contextual Info: M O S E L V IT E L IC V53C16256L 3.3 VOLT 2 5 6 K X 16 FAST PAGE MODE CMOS DYNAMIC RAM PRELIMINARY 40 45 50 60 Max. RAS Access Time, tpAo 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (fc/vO 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tpC)

Contextual Info: MOSEL VITELIC V53C16129H HIGH PERFORMANCE 128K X 16 BIT EDO PAGE MODE CMOS DYNAMIC DRAM PRELIMINARY 40 45 50 60 Max. RAS Access Time, tRAC 40 ns 45 ns 50 ns 60 ns Max. Column Address A ccess Tim e, (tc/vO 20 ns 22 ns 24 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC)

Contextual Info: M OSEL VITELIC V53C311640500 3.3 VOLT 4M X 4 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C311640500 50 60 70 Max. RAS Access Time, Orac 50 ns 60 ns 70 n Max. Column Address Access Time, 25 ns 30 ns 35 ns Min. Extended Data Out Page Mode Cycle Time, PC)

V53C8256H

Abstract: DD03b
Contextual Info: M OSEL VITELIC P R E LIM IN A R Y V53C404H 1M x 4 F A S T P A G E M O D E C M O S D Y N A M IC R A M HIGH PERFORMANCE 40 45 50 60 Max. RAS Access Time, Irac 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Fast Page Mode Cycle Time, (tPC)

Contextual Info: M O SEL VITELIC V53C511816500 1 M X 1 6 EDO PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE 50 60 70 Max. RAS Access Time, Orac 50 ns 60 ns 70 ns Max. Column Address Access Time, ^ aa) 25 ns 30 ns 35 ns Min. Extended Data Out Page Mode Cycle Time, (Vc) 20 ns

CL2C12

Contextual Info: MOSEL- VITELIC V53C100N HIGH PERFORMANCE, 3.3 VOLT 1 M X 1 B IT FA ST PAGE MODE CMOS DYNAMIC RAM HIGH PERFORMANCE V53C100N 60/60L PRELIMINARY 70/70L 80/80L Max. RAS Access Time, tRAC 60 ns 70 ns 80 ns Max. Column Address Access Time, (tCAA) 35 ns 40 ns 45 ns

Contextual Info: M OSEL V IT E U C V53C16258HN HIGH PER FO R M AN C E3.3 VOLT 256K X 16 PAG E MODE CMOS DYNAMIC R AM WITH EXTENDED DATA OUTPUT HIGH PERFORMANCE ADVANCED INFORMATION 45 50 55 60 M ax. RAS A cce ss T im e, tHAC 45 ns 50 ns 55 ns 60 ns M ax. C olum n A d dre ss A cce ss T im e, (tCAA)

Contextual Info: MOSEL VITELIC PRELIMINARY V408J32 1M x 32 HIGH PERFORMANCE EDO MEMORY MODULE Features Description • ■ The V 408J32 memory Module is organized as 1,097,152 x 32 bits in a 72-lead single-in-line mod­ ule. The 1M x 32 memory module uses 8 MoselVitelic 1M x 4 DRAMs. The x32 modules are ideal

Contextual Info: M O S E L V IT E L IC V 5 3C 1 81608 1M X 16 P A G E M O D E C M O S D Y N A M IC R A M W ITH E X T E N D E D D A TA O U T P U T P R E L IM IN A R Y HIGH PERFORMANCE 50 60 70 Max. RAS Access Time, tRAC 50 60 ns 70 ns Max. Column Address Access Time, (tCAA)