DD03B Search Results

LC7970

Abstract: 16 PU DIP28S 3029a CNF1
Contextual Info: ISE D I ? TT 7 □•7b DD03b3fci fl | SANYO SEMICONDUCTOR CORP i T - ^ S ' 13> 70 C M O S IC 3029A Key Scan Detector for Key Board of Capacitance Type I936A Functions Features . Contains an 8-input 1-output analog multiplexer. . Contains 2 CMOS OP amplifiers open loop gain: approximately 45dB typ. .

Contextual Info: SIE D • Ö13bb71 DD03b3ö 3flb « S E K G SEMIKRON S E M I K R O N INC Absolute Maximum Ratings Symbol Conditions1 VcES VcGR lc Rge = 20 k f l Values .121 D . 101 D 1000 1000 V ges Ptot T], Tstg Visoi per IGBT, Tease = 25 °C AC, 1 min humidity DIN 40 040

Contextual Info: rSTOKO TK702XX 1.03 V REGULATOR WITH ON/OFF SWITCH FEATURES APPLICATIONS • Low Input Voltage Operation Single Battery Cell ■ Internal PNP Transistor ■ Pagers ■ Built-In Shutdown Control (Off Current, 8 |iA Typ) ■ Low Dropout Voltage (30 mV Typ)

4000SC

Contextual Info: UPD30401 V R 4000SC 64-Bit Microprocessor Preliminary Hardware User's Manual Publication ID: IEU-1331 Publication Date: December 1, 1992 Company: N E C ELECTRONICS INC Th is title page is provided as a service by Inform ation Handling S ervices and displays

CXD2500AQ

Abstract: CXD2500Q sony tv diagram DA05 DA10 DA16 S03V RIR AS3 ON
Contextual Info: Description The CXD2500AQ/AQZ is a digital signal process­ ing LSI designed fo r use in compact disc players, it has the follow ing functions: • A wide frame jitte r margin ± 2 8 frames realized by a built-in 32K RAM. • Generation by the use of a digital PLL of bit clock

25X1

Abstract: bq4024 bq4024Y
Contextual Info: bq4024/bq4024Y BENCHMARQ 128Kx16 Nonvolatile SRAM Features General Description >• D ata retention in th e absence of power T he CMOS bq4024 is a nonvolatile 2,097,152-bit static RAM organized as 131,072 w ords by 16 b its. The i n t e g r a l c o n tr o l c ir c u it r y a n d

74LS74 function table

Abstract: 74LS74 gate diagram 74LS74 pinout 74ls74 pin configuration 74LS04P EGG RETICON silicon linear photodiode array 741S74 74LS74 PIN NUMBER DIAGRAM RETICON
Contextual Info: E 6 & G RETICON M7E D • 3030738 OOOSbbS 3 « R E T n EEzG RETICON R00720B Circular Array T-VhSS — General Description The R00720B is a high resolution circular solid state scanner designed specifically for applications such as focusing, tracking, angle discrimination, etc. This monolithic integrated

Contextual Info: MOSEL VITELIC V53C16258H 256KX 16 PAGE MODE CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT HIGH PERFORMANCE PRELIMINARY 40 45 50 60 Max. R A S Access Time, tf^c 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC)

0-15V

Abstract: 0-18V 10-15V CS-212 CS-212DW16 CS-212DWR16 CS-212N16
Contextual Info: CS-212 Security Detector Serial-Addressable Receiver/Transmitter D escription The S-ART is a 16 p in circuit designed for data transm ission on a tw o-lead cable. The circuit is spe­ cially developed for alarm system s w here it is desired to identify each

Contextual Info: pMC-Sierra, Inc. PM7323 RCMP-200 P r e l im in a r y I n f o r m a t io n is su e 1 ROUTING CONTROL, MONITORING AND POUCING 200 Mbps FEA TU R ES • Monolithic single chip device which handles ATM switch Ingress VPI/VCI address translation, cell appending, cell rate policing, counting, and OAM requirements

Contextual Info: September 1994 MiL Micro Linear PREL,M ,N ARY ^ ML6672 ATM UTP Transceiver GENERAL DESCRIPTION The M L6672 is a complete monolithic transceiver for 155Mbps NRZ encoded data transmission over Category 5 Unshielded Twisted Pair and Shielded Twisted Pair cables.

Contextual Info: November 1994 AD V A N C ED IN FO RM ATIO N Micro Linear ML6682 Token Ring Physical Interface GENERAL DESCRIPTION FEATURES The ML6682 Token Ring Physical Interface Circuit is designed for use as a token ring concentrator port interface in 4Mb/s and 16Mb/s IEEE 802.5 networks using category 4

Contextual Info: EPSON _ SED1530 Series Dot Matrix LCD Controller Driver • Ultra Low Power Consumption • Built-in Power Supply Circuit for LCD • 133 Driver Output • DESCRIPTION The SED 1530 series is a single-chip LCD driver for dot-m atrix liquid crystal displays LC D’s which is directly

Contextual Info: SC201 0.5A <§ FAST RECOVERY DIODE • O utline Drawing 121“ H Features Marking • Surface mount device • High voltage by mesa design • High reliability - CATHODE MARKING ■SYMBOL A-SYI I GA 14 j- H Applications • High speed switching

TSFL

Contextual Info: PHILIPS E C G INC 17E D • bL.53‘i5fl 0 0 0 3 5 ^ 1 ECG906 DUAL HIGH-FREQUENCY DIFFERENTIAL AMPLIFIER semiconductors For Low-Power Applications at Frequencies up to 500 MHz ECG908 conilsts o f two Independent differential amplifiers with associated constant-current tran­

Contextual Info: A S 4 C 2 5 6K 1 6F 0 Il 5V 2 5 6 K x 1 6 C M O S DRAM fast page m ode Features • Organization: 262,144 w ords by 16 bits • High speed - 2 5 /3 0 /3 5 /5 0 ns RAS access time - 12/1 6 /1 8 /2 5 ns column address access time - 7 /1 0 /1 0 /1 0 ns CAS access time

2SC4230

Contextual Info: H F X series Switchirç Power Transistor 2a 2SC4230 NPN ÎT2V80HFX) > IW B r f s iE I Outline Dimensions •'VrO-’-T V - - " - JSN M W O fc '^ .a S& ir: Absolute Maximum Ratings « ^ ft Conditions 12 # Symbol Item iS 'ffiS .S L Storage Temperature T s tg

V53C16258H

Abstract: 3bld
Contextual Info: MOSEL VITELIC V53C16258H 256KX 16 PAGE MODE CMOS DYNAMIC RAM WITH EXTENDED DATA OUTPUT HIGH PERFORMANCE PRELIMINARY 40 45 50 60 Max. R A S Access Time, tf^c 40 ns 45 ns 50 ns 60 ns Max. Column Address Access Time, (tCAA) 20 ns 22 ns 24 ns 30 ns Min. Extended Data Out Page Mode Cycle Time, (tPC)

bq4010

Abstract: bq4010-150 bq4010-85 bq4010Y bq4010Y-xxxN
Contextual Info: bq4010 /bq401 OY te il BENCHMARQ 8Kx8 Nonvolatile SRAM Features General Description >• D ata retention in th e absence of pow er The CMOS bq4010 is a nonvolatile 65,536-bit static RAM organized as 8,192 words by 8 bits. T he integral control circuitry and lithium energy

Contextual Info: M O S E L ViTEUC V104J8 256K C M O S MEMORY M ODULE Features Description • ■ ■ ■ ■ ■ The V104J8 Memory Module is organized as 2 62,144 x 8 bits in a 30-lead single-in-line module. The 256K x 8 memory module uses two Vitelic 256K x 4 DRAMs. Decoupling capacitors, mounted

Contextual Info: QS6612 Preliminary Data Sheet Rev. 2.4 QS6612 lO/lOOBaseTX M il Transceiver for Category 5 Twisted Pair Cable Ô 1.0 QS6612 DISTINCTIVE FEATURES IEEE 802.3u compliant M il and Serial Management standard interface IEEE 802.3u compliant Auto-Negotiation for auto

tv video modulator

Abstract: NTE845
Contextual Info: LINEAR INTEGRATED CIRCUITS NTE843 16-Lead DIP, See Diag. 249 TV Video IF PLL Sync Det, VCC-15V Limiter Tuning Q AFT Tuning Limiter Tuning B AFT Tuning GND V Q AFT Defeat Video IF Input APC Filter VCO Tuning VCO Tuning V(+> NTE844 28-Lead DIP, See Diag. 253

SED13305

Abstract: epson e-1330 E-1330 6264 SRAM E-1330 ic manual E-1330 lcd manual 5x7 within 6x8 font kanji 2TC 66 SED1335FOB 1335F
Contextual Info: SEDI 33OF/1335F/1336F LCD Controller ICs Technical Manual S-MOS Systems, Inc. September, 1995 Version 0.4 S-MOS Systems, Inc. •2460 North First Street • San Jose, CA 95131 •Tel: 408 922-0200 • Fax: (408) 922-0238 • T'lBE'lO'l 0G03517 052 ■ ,

0-15V

Abstract: 0-18V 10-15V CS-212 CS-212DW16 CS-212DWR16 CS-212N16
Contextual Info: CS-212 Security Detector Serial-Addressable Receiver/Transmitter D escription The S-ART is a 16 p in circuit designed for data transm ission on a tw o-lead cable. The circuit is spe­ cially developed for alarm system s w here it is desired to identify each