LVCH16374A Search Results

Contextual Info: 3.3V C M O S 16-BIT R E G IS T E R 3-STATE WITH BUS HO LD AND 5 VOLT T O L E R A N T I/O IDT74LVCH1 6374A ADVANCE INFORMATION FE ATURES: DESCRIPTION: • C o m m o n feat ures: The LVCH16374A 16-bit edge-triggered D-type registers are built using advanced dual metal CMOS technology. These

Contextual Info: LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: The LVCH16374A 16-bit edge-triggered D-type register is built using

IDT74LVCH16374A

Abstract: LVCH16374A
Contextual Info: LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: The LVCH16374A 16-bit edge-triggered D-type register is built using

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS565K – MARCH 1996 – REVISED AUGUST 2002 D D D D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family Operates From 1.65 V to 3.6 V

C101

Abstract: SN74LVCH16374A SN74LVCH16374ADL SN74LVCH16374AGRDR SN74LVCH16374AZRDR
Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

C101

Abstract: SN74LVCH16374A SN74LVCH16374ADL SN74LVCH16374AGRDR SN74LVCH16374AZRDR
Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION • Typical tSK o (Output Skew) < 250ps

Contextual Info: LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION • Typical tSK o (Output Skew) < 250ps

IDT74LVCH16374A

Abstract: LVCH16374A
Contextual Info: Integrated Device Technology, Inc. 3.3V CMOS 16-BIT REGISTER 3-STATE WITH BUS HOLD AND 5 VOLT TOLERANT I/O LVCH16374A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: – Typical tSK(o) (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

C101

Abstract: SN74LVCH16374A SN74LVCH16374ADL SN74LVCH16374AGRDR SN74LVCH16374AZRDR
Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

C15203

Contextual Info: High-Speed CMOS 3.3V 16-Bit Register 3-State with Bus Hold Q ua lity Semiconductor, I nc. LVCH16374A ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during 3-state operation

LVCH16374A

Abstract: SN74LVCH16374A SN74LVCH16374ADGGR SN74LVCH16374ADGVR SN74LVCH16374ADL SN74LVCH16374ADLR
Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS SCAS565H – MARCH 1996 – REVISED MARCH 2001 D D D D D D D Member of Texas Instruments’ Widebus  Family Typical VOLP Output Ground Bounce <0.8 V at VCC = 3.3 V, TA = 25°C

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: LVCH16374A 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS www.ti.com SCAS757A – DECEMBER 2003 – REVISED OCTOBER 2005 FEATURES • • • • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus

Contextual Info: 3.3V CMOS 16-BIT IDT74L VCH16374A EDGE-TRIGGERED D-TYPE FLIPFLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD FE A T U R E S : - Typical - ESD > 2000V per MIL-STD-883, Method 3015; - 0.635mm pitch S SO P , 0.50mm pitch T S S O P tsK o (Output Skew) < 250ps

Contextual Info: LVCH16374A 3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, 5V TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: LVCH16374A ADVANCE INFORMATION High-Speed CMOS 3.3V 16-Bit Register 3-State with Bus Hold Q QUALITY SEMICONDUCTOR, INC. LVCH16374A ADVANCE INFORMATION FEATURES/BENEFITS DESCRIPTION • 5V tolerant inputs and outputs • Bus Hold feature holds last active state during