ALVCH16823 Search Results

Contextual Info: 3.3 V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - ALVCH16823 ticularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working reg­ isters. The ALVCH16823 can be used as two 9-bit flip-flops or

Contextual Info: 3.3 V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - ticularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working reg­ isters. The ALVCH16823 can be used as two 9-bit flip-flops or

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

alvch16823

Contextual Info: FEATURES: - 0.5 MICRON CMOS Technology Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP, and 0.40mm pitch TVSOP packages Extended commercial range of - 40°C to + 85°C

Contextual Info: www.ti.com ALVCH16823 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCES038F – JULY 1995 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process

ALVCH16823

Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16823 DESCRIPTION: FEATURES: This 18-bit bus-interface flip-flop is built using advanced dual metal CMOS

IDT74ALVCH16823

Abstract: ALVCH16823
Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16823 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK o (Output Skew) < 250ps

IDT74ALVCH16823

Abstract: ALVCH16823
Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16823 DESCRIPTION: FEATURES: This 18-bit bus-interface flip-flop is built using advanced dual metal CMOS

LVX161284

Abstract: HSP50415 all ic datasheet in one pdf file CY37256V CY7C1327 HC244 HSP50415EVAL1 ALVCH16823 CPLD
Contextual Info: HSP50415EVAL1 TM Data Sheet April 2000 FN4859 HSP50415EVAL1 Evaluation Kit Features The HSP50415EVAL1 is an evaluation kit for the HSP50415 wideband programmable modulator. The kit consists of an evaluation Circuit Card Assembly CCA complete with the HSP50415 device and additional circuitry to provide for

Contextual Info: 3.3V CMOS 18-BIT REGISTER WITH CLEAR AND CLOCK ENABLE ALVCH16823 IDT74ALVCH162823 PRODUCT PREVIEW FEATURES: DESCRIPTION: • Common features: The ALVCH16x823 is a high speed clocked register with clock enable and clear. These devices are ideal for high speed

IDT74ALVCH16823

Abstract: SO56-2
Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: ALVCH16823 registers, I/O ports, bidirectional bus drivers with parity, and working

Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16823 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK o (Output Skew) < 250ps

IDT74ALVCH16823

Abstract: SO56-2 ALVCH16823 c 4237
Contextual Info: 3.3V CMOS 18-BIT REGISTER WITH CLEAR AND CLOCK ENABLE ALVCH16823 ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: DESCRIPTION: • Common features: – 0.5 MICRON CMOS Technology – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;

lvch16823

Contextual Info: 3.3 V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD FE A T U R E S : - 0.5 MICRON CMOS Technology registers, I/O ports, bidirectional bus drivers with parity, and working registers. - Typical - ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: www.ti.com ALVCH16823 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS SCES038F – JULY 1995 – REVISED APRIL 2005 FEATURES • • • • • • Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process

Contextual Info: ALVCH16823 3.3V CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT BUS-INTERFACE FLIPFLOP WITH 3-STATE OUTPUTS AND BUS-HOLD ALVCH16823 FEATURES: DESCRIPTION: • 0.5 MICRON CMOS Technology • Typical tSK o (Output Skew) < 250ps