LVCH16373 Search Results

Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH16373A 16-bit transparent D-type latch is built using advanced dual metal CMOS technology. This high­ speed, low-power latch is ideal for tem porary storage of

Contextual Info: Integra ted D evice Technology, inc. 3.3V C M O S 16-BIT T R A N S P A R E N T LATCH WITH BUS HO LD AND 5 VOLT T O L E R A N T I/O IDT74LVCH1 6373A ADVANCE INFORMATION FE ATURES: DESCRIPTION: • C o m m o n feat ures: The LVCH16373A16-bit transparent D-type latches are built

lvch16373a

Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH16373A 16-bit transparent D-type latch is built using advanced dual metal CMOS technology. This high­ speed, low-power latch is ideal for tem porary storage of

IDT74LVCH16373A

Abstract: LVCH16373A
Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: The LVCH16373A 16-bit transparent D-type latch is built using advanced

Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: The LVCH16373A 16-bit transparent D-type latch is built using advanced

74LVC16373A

Abstract: 74LVC16373ADGG 74LVC16373ADL 74LVCH16373A 74LVCH16373ADGG 74LVCH16373ADL TSSOP48
Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC16373A; LVCH16373A 16-bit D-type transparent latch with 5 V tolerant inputs/outputs; 3-state Product specification Supersedes data of 2002 Oct 02 2003 Dec 08 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V

Contextual Info: 3.3V CMOS 16-BIT LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP

IDT74LVCH16373A

Abstract: LVCH16373A
Contextual Info: Integrated Device Technology, Inc. 3.3V CMOS 16-BIT TRANSPARENT LATCH WITH BUS HOLD AND 5 VOLT TOLERANT I/O LVCH16373A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;

A115-A

Abstract: SN74LVCH16373A SN74LVCH16373ADL SN74LVCH16373AGRDR SN74LVCH16373AZRDR
Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS568M – MARCH 1996 – REVISED FEBRUARY 2006 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Typical VOLP (Output Ground Bounce)

74LVC05

Abstract: 7400 datasheet 2-input nand gate 74LVC05A LVC1G04 transistor x1 pv 25 inverter board design pv 74ALVC1G04 74ALVCH244 7400 nand gate series 74ALVC1G14
Contextual Info: Selector Guide for ALVC/LVC Products the leading provider of high-performance logic. From single-gate to 32-bit, IDT is your source for ALVC/LVC logic. Today’s designers are developing the most challenging telecommunications, networking and PC products ever designed

Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION • Typical tSK o (Output Skew) < 250ps

Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS568M – MARCH 1996 – REVISED FEBRUARY 2006 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Typical VOLP (Output Ground Bounce)

smd 1le

Contextual Info: INTEGRATED CIRCUITS DATA SHEET 74LVC16373A; LVCH16373A 16-bit D-type transparent latch with 5 V tolerant inputs/outputs 3-state Product specification Supersedes data of 1998 Mar 17 2002 Sep 12 Philips Semiconductors Product specification 16-bit D-type transparent latch with 5 V

Contextual Info: LVCH16373A 16ĆBIT TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCAS568L − MARCH 1996 − REVISED SEPTEMBER 2003 D Member of the Texas Instruments D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Widebus  Family Typical VOLP (Output Ground Bounce)

LVCH16373

Abstract: A115-A SN74LVCH16373A SN74LVCH16373ADGGR SN74LVCH16373ADL SN74LVCH16373ADLR LVCH1637
Contextual Info: LVCH16373A 16ĆBIT TRANSPARENT DĆTYPE LATCH WITH 3ĆSTATE OUTPUTS SCAS568L − MARCH 1996 − REVISED SEPTEMBER 2003 D Member of the Texas Instruments D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Widebus  Family Typical VOLP (Output Ground Bounce)

Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS568M – MARCH 1996 – REVISED FEBRUARY 2006 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Typical VOLP (Output Ground Bounce)

IDT74LVCH16373A

Abstract: LVCH16373A
Contextual Info: LVCH16373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION • Typical tSK o (Output Skew) < 250ps

Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS568M – MARCH 1996 – REVISED FEBRUARY 2006 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Typical VOLP (Output Ground Bounce)

Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS756 – DECEMBER 2003 – REVISED DECEMBER 2005 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family

A115-A

Abstract: SN74LVCH16373A SN74LVCH16373ADL SN74LVCH16373AGRDR SN74LVCH16373AZRDR
Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS www.ti.com SCAS568M – MARCH 1996 – REVISED FEBRUARY 2006 FEATURES • • • • • • • • DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus Family Typical VOLP (Output Ground Bounce)

A115-A

Abstract: SN74LVCH16373A SN74LVCH16373ADL SN74LVCH16373ADLR
Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS568K – MARCH 1996 – REVISED MARCH 2002 D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

LVC16245

Abstract: philips semiconductor data handbook LCX16245 lcx245 SN74ALVCH16245 SN74LV245 SCAA001 SN74LVC245 SN74LVC245A SN74LVCH245
Contextual Info: LVC CHARACTERIZATION INFORMATION 1 LVC COMPARISON TO OTHER LOWĆVOLTAGE LOGIC FAMILIES 2 LVC AND 5ĆV TOLERANCE A 5ĆV TOLERANT LVC - RELEASED DEVICES B FREQUENTLY ASKED QUESTIONS C TI'S LOWĆVOLTAGE PORTFOLIO D ADVANCED PACKAGING E LVC DESIGNER'S GUIDE SCBA010

A115-A

Abstract: SN74LVCH16373A SN74LVCH16373ADL SN74LVCH16373ADLR
Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS568I – MARCH 1996 – REVISED MARCH 2001 D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of Texas Instruments’ Widebus Family Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

lvch16373a

Contextual Info: LVCH16373A 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS SCAS568J – MARCH 1996 – REVISED SEPTEMBER 2001 D D D D D D D D DGG, DGV, OR DL PACKAGE TOP VIEW Member of the Texas Instruments Widebus  Family Typical VOLP (Output Ground Bounce)