LV04 Search Results

Contextual Info: LV04EVK01 Page 1 of 1 Search For. Evaluation Boards & Development Tools Part Number Related ICs LV04EVK01 Price Place Order Comments LV04EVK01 Evaluation Kit LV0421, LV0422, LV0411, LV0412, This Product is Lead-Free Evaluation Board License Agreement

Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388G – SEPTEMBER 1997 – REVISED OCTOBER 2002 LV04A . . . J OR W PACKAGE LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC

AT17

Abstract: AT17LV040 AT24CXXX AT40K ATDH2200E XC3000 XC4000 XC5200 AT17C
Contextual Info: Features • EE reprogrammable 4,194,304 x 1 bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays FPGAs • In-System Programmable via 2-wire Bus • Simple Interface to SRAM FPGAs • Compatible with Atmel AT6000, AT40K FPGAs, Altera FLEX Devices,

AT49LV040

Abstract: 496k AT49BV040 AT49LV040-70TC AT49BV040-12JC
Contextual Info: Features • • • • • • • • • Single Voltage for Read and Write: 2.7V to 3.6V BV , 3.0V to 3.6V (LV) Fast Read Access Time – 70 ns Internal Program Control and Timer 16K Bytes Boot Block with Lockout Fast Chip Erase Cycle Time – 10 seconds

Contextual Info: Features Single Voltage for Read and Write: 2.7V to 3.6V BV , 3.0V to 3.6V (LV) Fast Read Access Time -120 ns Internal Program Control and Timer 16K bytes Boot Block With Lockout Fast Chip Erase Cycle Time -1 0 seconds Byte-by-Byte Programming - 30 |is/Byte Typical

Contextual Info: LV040A Features • • • • • Single 3.3 V ± 10% Supply Three-Volt-Only Read and Write Operation Software Protected Programming Fast Read Access Time - 200 ns Low Power Dissipation 15 mA Active Current 20 ^A CMOS Standby Current Sector Program Operation

07I04

Abstract: V040T
Contextual Info: Features * * * * * * * * * Single Voltage for Read and W rite: 2.7V to 3.6V BV , 3.0V to 3.6V (LV) Fast Read Access Tim e - 1 2 0 ns Internal Program Control and Timer 16K bytes Boot Block With Lockout Fast Chip Erase Cycle Tim e -1 0 seconds Byte-by-Byte Programming - 30 |as/Byte Typical

496k

Abstract: AT49BV040 AT49LV040 AT49LV040 70TI
Contextual Info: Features • • • • • • • • • Single Voltage for Read and Write: 2.7V to 3.6V BV , 3.0V to 3.6V (LV) Fast Read Access Time – 70 ns Internal Program Control and Timer 16K Bytes Boot Block with Lockout Fast Chip Erase Cycle Time – 10 seconds

Contextual Info: LV04A-Q1 HEX INVERTER SCLS514C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

LV04A

Abstract: 74lv04a
Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388E – SEPTEMBER 1997 – REVISED AUGUST 2002 LV04A . . . J OR W PACKAGE LV04A . . . D, DB, DGV, NS, OR PW PACKAGE TOP VIEW 14 2 13 3 12 4 11 5 10 6 9 7 8 VCC 6A 6Y 5A 5Y 4A 4Y 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC

BU90LV047

Contextual Info: LVDS Interface ICs 4bit LVDS Receiver LV048 No.12057EAT03 ●Description LVDS Interface IC of ROHM "Serializer" "Deserializer" operate from 8MHz to 150MHz wide clock range, and number of bits range is from 35 to 70. Data is transmitted seven times 7X stream and reduce cable number by 3(1/3) or less. The

A115-A

Abstract: C101 LV04A SN54LV04A SN74LV04A
Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3

LV04A

Abstract: SN54LV04A SN74LV04A
Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388B – SEPTEMBER 1997 – REVISED JUNE 1998 D D D D D EPIC Enhanced-Performance Implanted CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C

Contextual Info: LV04A-Q1 HEX INVERTER SCLS514C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

MTSS001C

Abstract: SN74LV04A SN74LV04A-Q1 SN74LV04ATPWRG4Q1 SN74LV04ATPWRQ1
Contextual Info: LV04AĆQ1 HEX INVERTER SCLS514C − JULY 2003 − REVISED FEBRUARY 2008 D Qualified for Automotive Applications D ESD Protection Exceeds 2000 V Per D D D D D D PW PACKAGE TOP VIEW MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)

Diode RL 4B

Abstract: PI90LV044LE LVB044 PI90LV044 PI90LVB044 PI90LVB044LE 3b1a
Contextual Info: LV044, PI90LVB044 LVDS Dual 2x2 Crosspoint/Repeater Switch Features Description • Dual 2x2 Crosspoint/Repeater Switch  Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995  Designed for Signaling Rates up to 650 Mbit/s 325Mhz  Operates from a single 3.3V Supply: –40°C to 85°C

PI90LV047A

Abstract: PI90LV047ALE PI90LV047AWE
Contextual Info: LV047A

Contextual Info: LV04AĆQ1 HEX INVERTER SCLS514B − JULY 2003 − REVISED MAY 2004 D Qualification in Accordance With D D D D D D D D Support Mixed-Mode Voltage Operation on AEC-Q100† Qualified for Automotive Applications Customer-Specific Configuration Control Can Be Supported Along With

7054F

Abstract: BC564A HA13563 AC123A HITACHI microcontroller H8 534 manual IC 74LS47 AC538 BC245A 2SK3235 HA13557
Contextual Info: INDEX General General Information Semiconductor Packages Sales Locations Microcontroller Microcontroller General MultiChipModules Smart Card Micro. Overview Micro. Shortform Micro. Hardware Manual Micro. Program. Manual Micro. Application Notes LCD Controller / Driver

LV04A

Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3

Diode RL 4B

Abstract: LVB044 PI90LV044 PI90LV044L PI90LV044Q PI90LV044QE PI90LVB044 3Z33B PI90LV044LE
Contextual Info: LV044, PI90LVB044 LVDS Dual 2x2 Crosspoint/Repeater Switch Features Description • Dual 2x2 Crosspoint/Repeater Switch • Meets or Exceeds the Requirements of ANSI TIA/EIA-644-1995 • Designed for Signaling Rates up to 650 Mbit/s 325Mhz • Operates from a single 3.3V Supply: –40°C to 85°C

A115-A

Abstract: C101 LV04A SN54LV04A SN74LV04A
Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388J − SEPTEMBER 1997 − REVISED APRIL 2005 D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Latch-Up Performance Exceeds 250 mA Per 13 3 12 4 11 5 10 6 9 7 8 1Y 2A 2Y 3A 3Y 14 1Y 1A NC VCC 6A 1 2 13 6A 3

Contextual Info: LV04A, LV04A HEX INVERTERS SCLS388B – SEPTEMBER 1997 – REVISED JUNE 1998 D EPIC Enhanced-Performance Implanted D D D D CMOS Process Typical VOLP (Output Ground Bounce) < 0.8 V at VCC, TA = 25°C Typical VOHV (Output VOH Undershoot) > 2 V at VCC, TA = 25°C

SN74 schmitt trigger

Abstract: SDYU001 SN54LV00A SN54LV02A SN54LV04A SN54LV05A SN54LV08A SN54LV14A SN54LV32A SN54LV74A
Contextual Info: LVC and LV LowĆVoltage CMOS Logic Data Book 1998 Logic Products General Information LVC Gates and MSI LVC Octals LVC Widebus LVC 3.3-V to 5-V Translators and Cable Drivers LV Gates and MSI LV Octals Application Reports Mechanical Data LVC and LV Low-Voltage CMOS Logic