LTDO Search Results

intel CORE i3 instruction set

Abstract: intel packaging handbook 240800
Contextual Info: 80960JA/JF/JD/JT 3.3 V Embedded 32Bit Microprocessor Preliminary Datasheet Product Features • Pin/Code Compatible with all 80960Jx Processors ■ High-Performance Embedded Architecture — One Instruction/Clock Execution — Core Clock Rate is: 80960JA/JF lx the Bus Clock

DS1820 sensor and program

Abstract: dallas DS1820 sensor DS1820 sensor datasheet RJ11 to RS232 LDTO-028K DS1820 sensor datasheet and program DS1820 sensor Piezo sensor digital thermometer program piezo cable
Contextual Info: APPLICATION NOTE 104 Application Note 104 Minimalist Temperature Control Demo FEATURES DESCRIPTION • Direct–to–digital, direct–to–PC instrumentation with graphical user interface demo • Ready to use temperature control demonstration including piezo–sensor for sensing of mechanical

Contextual Info: TSS901E Intelligent and Flexible IEEE 1355 Communication Controller for Space Description and Applications The TSS901E provides an interface between a DataStrobe link - according to the IEEE Std 1355-1995 specification carrying a simple interprocessor communication protocol - and a data processing node

PD7228AG

Abstract: lina CS-7 c4111 upd7228 D7228A 101 R15 N 101 JT IC FIP 7B 83 16F NEC PD7228 uPD7228A
Contextual Info: ^ . — 5 1 . S / — h m os jm m sb M O S Integrated Circuit « P D 7228A 7 "7 7 ' J U L C D 3 v h □ — 7 / K - fa ^PD7228Ali, K v I- • v \ I ?,7 j& < n 8, 16 « » S IL C D £ v -f J> nyn-bvt»-£O T-l' > 9 7 x - * t » 8 6 £ T ^ T }# o T l v & L C D □ > h 0 - 7 / K v - f A ' T T o

dps-150

Contextual Info: MODEL NO: PART NO: DPS150100-P5 C U I IN C UNIT: mm PAGE NO:1 o f 5 DATE: 04/24/02 All inform ation contained herein applies only to the above listed part number. O ther versions o f this part num ber w ith electrical or mechanical variations are available. Contact CUI Inc. for further assistance. 9615 SW Allen Blvd., Ste. 103, Beaverton OR 97005

g2021

Contextual Info: ANALOG DEVICES 1 4 -Bit, 100 M SPSf TxDAC * [> A C o n v erter AD9764 F U N C T IO N A L BLOCK DIA G R AM FEATURES M em ber of Pin-Com patible TxDAC™ Product Family 125 MSPS Update Rate 14-Bit Resolution Excellent SFDR and IM D D ifferential Current Outputs: 2 mA to 20 mA

Intel i960 VH Embedded-PCI Processor Provides Integrated Memory Control and PCI Bus Interface

Contextual Info: i960 VH Embedded-PCI Processor Advance Information Datasheet Product Features • High Performance 80960JT Core — Sustained One Instruction/Clock Execution — 16 Kbyte Two-Way Set-Associative Instruction Cache — 4 Kbyte Direct-M apped Data Cache — Sixteen 32-Bit Global Registers

DS2501 transistor

Abstract: WASHING machine interfacing 8051 Sony Semiconductor Replacement Handbook 1991 touch dimmer TC 306 S PNI 12927 edn handbook dallas ds2501 NE5532 signetics texas instruments cmos mosfet MOSFET BOOK
Contextual Info: J Copyright 1996 by Dallas SemiconductorCorporation. All Rights Reserved. Dallas Semiconductor retains all ownership rights in the technology described herein. Trademarks and registered trademarks of Dallas Semiconductor include each of the following: Dallas Semiconductor Corporation

c5404

Abstract: circuit diagram of bluetooth fm transmitter am29lv032 dlc7 14 pin (2x7), 2mm header 2N7002CT-ND u12 sot audio bluetooth transmitter 3.5mm HEXFET Power MOSFET designer manual fm modulator cigaret 12 v
Contextual Info: Texas Instruments Hands-Free Kit Development Platform User’s Guide Literature Number: SPRU703 December 2003 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any

ltdo

Contextual Info: 80960JA/JF/JD/JT 3.3 V EMBEDDED 32-BIT MICROPROCESSOR Advance Information Datasheet P ro d u c t F e a tu re s • Pin/Code Compatible with all 80960Jx Processors ■ High-Performance Embedded Architecture — One Instruction/Clock Execution — Core Clock Rate is:

B1T37

Abstract: RA8E 615XS h1LJ PCF5001 PCF5001H PCF5001T S028 UAA2050T UAA2080
Contextual Info: INTEGRATED CIRCUITS & g y iiT PCF5001 POCSAG Paging Decoder Product specification Supersedes data of September 1994 File under Integrated Circuits, IC03 1995 Apr 27 Philips Semiconductors P H IL IP S 71100Eb □OflTOlfi 47D This Material Copyrighted By Its Respective Manufacturer

Contextual Info: ADVANCE INFORMATION ¡960 RP/RD I/O PROCESSOR AT 3.3 VOLTS 33 MHz, 3.3 Volt Version 80960RP 33/3.3 66 MHz, 3.3 Volt Version (80960RD 66/3.3) - Clock Doubled 80960J F Core • Complies with PCI Local Bus Specification Revision 2.1 • 5 Volt P C I Signalling Environment

DS1820 sensor

Abstract: LDTO-028K Piezo sensor "Piezo Sensor" LDTO028K LTDO-028K DS2407P RJ11 cable DS1820 sensor datasheet and program piezo demo
Contextual Info: APPLICATION NOTE 104 Application Note 104 Minimalist Temperature Control Demo FEATURES DESCRIPTION • Direct–to–digital, direct–to–PC instrumentation with graphical user interface demo • Ready to use temperature control demonstration including piezo–sensor for sensing of mechanical

M-25012 states

Abstract: CY7C1360V25 CY7C1362V25 CY7C1364V25
Contextual Info: ^ „ CY7C1360V25 CY7C1362V25 W ^ T Y P R F .S S PREUm NARY CY7C 1364V25 256K X 36/256K x 32/512K x 18 Pipelined SRAM Features All synchronous inputs pass through input registers controlled by the rising edge of the clock. All data outputs pass through output registers controlled by the rising edge of the clock. Max­